Chapter 2 Real-Time Systems Concepts Foreground/Background ...

More documents

Recommendations

Info

Nonmaskable Interrupts (NMIs)• NMI cannot be disabled– Interrupt latency, response, and recovery are minimal– Interrupt latency– Interrupt response– Interrupt recoveryTime to execute longest instruction +Time to start executing the NMI ISRInterrupt latency +Time to save the CPU's contextTime to restore the CPU's context +Time to execute the return from interrupt instruction• Ex: Used NMI in an application to respond to an interruptoccurred every 150 us. An ISR which will take the processingtime from 80 to 125 us, and the kernel may disable interruptfor about 45 us. Then if we use maskable interrupt , the ISRcould have been late by 20 us.DisableingNonmaskable interruptsNMI Interrupt SourceOutputPortTo Processor's NMI Input2-47• When you are serving an NMI, you cannot use kernelservices to signla a task because NMIs cannot be disabldto access critical sections of code.• You can pass parameters to and from the NMI.– Parameters passed must be global variables and the size of thesevariables must be read or written indivisibly; that is, not as separatebyte read or write instructions.• EX: suppose the NMI service routine needs to signal a taskevery 40 times it executes– If the NMi occurs every 150us, a signal would be required every40 * 150us = 6ms.– From a NMI ISR, you cannot use the kernel to signal the task, butyou can use the following schemeNMI InterruptEvery 150 usIssues interrupt by writingto an output port.NMIISRISRPOSTEvery 150us*40 = 6msSemaphorePENDSignaling a task from a nonmaskable interruptTASK2-48
Clock Tick• A special interrupt that occurs periodically• Allows kernel to delay task for an internal number of clockticks• To provide timeout when task are waiting for event tooccur• The faster the tick rate, the higher the overhead imposed onthe system2-49Figure 2.25 delaying a task for one tick (case 1)Tick Interrupt20 mSTick ISRAll higher priority tasksDelayed TaskCall to delay 1 tick (20 mS)Call to delay 1 tick (20 mS)Call to delay 1 tick (20 mS)t1(19 mS)t2(17 mS)t3(27 mS)Due to the higher priority tasks and the ISRs execute prior to the delayed task, thedelayed task actually executes at varying intervals ( we call this variance is jitter)2-50
Page 1 and 2: Chapter 2Real-Time Systems Concepts
Page 3 and 4: • Resource- EX: I/O, CPU, Memory,
Page 5 and 6: • Foreground/background programmi
Page 7 and 8: Scheduler• Also called the dispat
Page 9 and 10: Figure 2.5 Preemptive kernelLow Pri
Page 11 and 12: Figure 2.7 Priority Inversion probl
Page 13 and 14: • Disabling and enabling interrup
Page 15 and 16: • Accessing shared data by obtain
Page 17 and 18: BUF * BufReq(void){BUF *ptr;Acquire
Page 19 and 20: Event Flags (uCOS-II does not suppo
Page 21 and 22: Message queues• Is used to send o
Page 23: Figure 2.21 non-preemptive kernelIn
Page 27: • Reduce the execution jitter of

Chapter 2 Real-Time Systems Concepts Foreground/Background ...

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?