ARM Compiler toolchain Developing Software for ARM Processors

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2.13 ARM architecture v7-A 2.13.1 Key features Key Features of ARM Architecture Versions This is an overview of the compilation tools support for ARMv7-A (ARMv7 architecture targeted at the application profile). Application profiles implement a traditional ARM architecture with multiple modes and support a virtual memory system architecture based on an MMU. These profiles support both ARM and Thumb instruction sets. the following table shows useful command-line options. Command-line option Description --cpu=7 ARMv7 with Thumb-2 only, and without hardware divide a 2.13.2 Alignment support 2.13.3 Endian support Key features for ARMv7-A: • Supports the advanced SIMD extensions • Supports the Thumb Execution Environment (ThumbEE). The data alignment behavior supported by the ARM architecture is significantly different between ARMv4 and ARMv7. An ARMv7 implementation must support unaligned data accesses. You can control the alignment requirements of load and store instructions by using the A bit in the CP15 register c1. Note ARMv7 architectures do not support pre-ARMv6 alignment. You can produce either little-endian or big-endian code using the compiler command-line options --littleend and --bigend respectively. ARMv7-A supports the following endian modes: LE little-endian format BE-8 big-endian format used by ARMv6 and ARMv7. Table 2-7 Useful command-line options --cpu=7-A ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb, Thumb-2, and Thumb-2EE instruction sets, NEON support, and 32-bit SIMD support --cpu=name Where name is a specific ARM processor. For example: • Cortex-A8 for ARMv7 with ARM, Thumb, Thumb-2, hardware VFP, NEON support, and 32-bit SIMD support. a. ARM v7 is not a recognized ARM architecture. Rather, it denotes the features that are common to all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures. The ARMv7 does not support the legacy BE-32 mode. If you have legacy code for ARMv7 processors that contain instructions with a big-endian byte order, then you must perform byte order reversal. ARM DUI 0471C Copyright © 2010-2011 ARM. All rights reserved. 2-20 ID080411 Non-Confidential
2.13.4 See also Key Features of ARM Architecture Versions Reference Using the Compiler: • Compiler storage of data objects by natural byte alignment on page 6-43. Compiler Reference: • --unaligned_access, --no_unaligned_access on page 3-204. Assembler Reference: • --cpu=name on page 2-8 • --bigend on page 2-6 • --littleend on page 2-17. Other information • ARM Architecture Reference Manual, http://infocenter/help/topic/com.arm.doc.subset.arch.reference/index.html. ARM DUI 0471C Copyright © 2010-2011 ARM. All rights reserved. 2-21 ID080411 Non-Confidential
Page 1 and 2: ® ARM Copyright © 2010-2011 ARM.
Page 3 and 4: Contents ARM Compiler toolchain Dev
Page 5 and 6: Contents 6.14 Single-channel DMA tr
Page 7 and 8: Chapter 1 Conventions and feedback
Page 9 and 10: Chapter 2 Key Features of ARM Archi
Page 11 and 12: Key Features of ARM Architecture Ve
Page 15 and 16: 2.5 Memory management 2.5.1 See als
Page 19 and 20: 2.9 ARM architecture v4T 2.9.1 Key
Page 21 and 22: 2.10 ARM architecture v5TE 2.10.1 K
Page 23 and 24: 2.11 ARM architecture v6 2.11.1 Key
Page 25 and 26: 2.11.4 See also Compiling for ARMv6
Page 27: Assembler Reference: • --cpu=name
Page 31 and 32: 2.14.4 See also Key Features of ARM
Page 33 and 34: 2.15.3 Endian support 2.15.4 See al
Page 35 and 36: 3.1 About embedded software develop
Page 37 and 38: 3.3 C library structure C Library D
Page 39 and 40: 3.4.1 See also ZI RW RO DATA CODE E
Page 41 and 42: 3.6 Tailoring the C library to your
Page 43 and 44: 3.7 Tailoring the image memory map
Page 45 and 46: 3.9 Root regions 3.9.1 See also Emb
Page 47 and 48: 3.11 Run-time memory models Embedde
Page 49 and 50: 3.12 Scatter-loading file with link
Page 51 and 52: 3.13.2 See also Embedded Software D
Page 53 and 54: 3.15 ROM and RAM remapping 3.15.1 E
Page 55 and 56: 3.17 Stack pointer initialization 3
Page 57 and 58: 3.19 Execution mode considerations
Page 59 and 60: Chapter 4 Mixing C, C++, and Assemb
Page 61 and 62: 4.1.1 See also Register access Phys
Page 63 and 64: 4.3 Including system C header files
Page 65 and 66: 4.5 Mixed-language programming 4.5.
Page 67 and 68: Mixing C, C++, and Assembly Languag
Page 69 and 70: 4.9 Examples of calling between lan
Page 71 and 72: 4.11 Calls to C from assembly langu
Page 73 and 74: 4.13 Calls to assembly language fro
Page 75 and 76: 4.15 Calls to C++ from assembly lan
Page 77 and 78: 4.16.1 See also To implement the fu
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Chapter 5 Interworking ARM and Thum
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5.2 When to use interworking 5.2.1
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5.4 C and C++ interworking 5.4.1 Se
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5.6 Using two versions of the same
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5.7.2 See also Interworking ARM and
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5.8.3 See also armlink arm.o thumb.
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Reference Compiler Reference: • -
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Reference Compiler Reference: • -
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Handling Processor Exceptions • U
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6.2 Exception handling process 6.2.
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Handling Processor Exceptions 6.4 V
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6.6 Use of System mode for exceptio
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6.8 Return from an exception handle
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6.10 Data Abort handler Handling Pr
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6.12 Reentrant interrupt handlers H
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6.12.1 See also Reference • Use o
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6.14 Single-channel DMA transfer Ha
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6.16 Interrupt prioritization Handl
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6.17 Context switch Handling Proces
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• SVC handlers in assembly langua
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6.20 SVC handlers in assembly langu
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6.21.1 See also Handling Processor
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6.23 Calling SVCs from an applicati
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6.24 Calling SVCs dynamically from
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6.25 Prefetch Abort handler Handlin
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6.27 ARMv6-M and ARMv7-M profiles 6
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6.29 Types of exceptions in the mic
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6.31 Vector Table Offset Register (
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6.33 The Nested Vectored Interrupt
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Handling Processor Exceptions Note
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Handling Processor Exceptions /* *
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6.37 Supervisor calls Handling Proc
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6.38 System timer 6.38.1 See also H
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Chapter 7 Debug Communications Chan
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7.2 DCC communication between targe
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7.3.1 See also Debug Communications
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Chapter 8 Semihosting The following
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8.1 What is semihosting? 8.1.1 See
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8.2 The semihosting interface 8.2.1
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8.3 Can I change the semihosting op
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8.5 Debug agent interaction SVCs 8.
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8.7 angel_SWIreason_ReportException
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8.8 SYS_CLOSE (0x02) 8.8.1 Entry 8.
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8.10 SYS_ELAPSED (0x30) 8.10.1 Entr
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8.12 SYS_FLEN (0x0C) 8.12.1 Entry 8
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8.14 SYS_HEAPINFO (0x16) 8.14.1 Ent
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8.16 SYS_ISTTY (0x09) 8.16.1 Entry
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8.18 SYS_READ (0x06) 8.18.1 Entry 8
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8.20 SYS_REMOVE (0x0E) 8.20.1 Entry
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8.22 SYS_SEEK (0x0A) 8.22.1 Entry 8
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8.24 SYS_TICKFREQ (0x31) 8.24.1 Ent
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8.26 SYS_TMPNAM (0x0D) 8.26.1 Entry
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8.28 SYS_WRITEC (0x03) 8.28.1 Entry
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Appendix A Revisions for Developing
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ARM Compiler toolchain Developing Software for ARM Processors

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