12.07.2015 Views

BCP56T1 Series NPN Silicon Epitaxial Transistor - Datasheet Catalog

BCP56T1 Series NPN Silicon Epitaxial Transistor - Datasheet Catalog

BCP56T1 Series NPN Silicon Epitaxial Transistor - Datasheet Catalog

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

<strong>BCP56T1</strong> <strong>Series</strong>INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGEMINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONSSurface mount board layout is a critical portion of the totaldesign. The footprint for the semiconductor packages mustbe the correct size to insure proper solder connectioninterface between the board and the package. With thecorrect pad geometry, the packages will self align whensubjected to a solder reflow process.SOT–223mminchesSOT–223 POWER DISSIPATIONThe power dissipation of the SOT–223 is a function ofthe pad size. This can vary from the minimum pad size forsoldering to the pad size given for maximum power dissipation.Power dissipation for a surface mount device is determinedby TJ(max), the maximum rated junction temperatureof the die, RθJA, the thermal resistance from the devicejunction to ambient; and the operating temperature, TA. Usingthe values provided on the data sheet for the SOT–223package, PD can be calculated as follows.PD =PD =150°C – 25°C83.3°C/WTJ(max) – TARθJAThe values for the equation are found in the maximumratings table on the data sheet. Substituting these values intothe equation for an ambient temperature TA of 25°C, onecan calculate the power dissipation of the device which inthis case is 1.5 watts.= 1.50 wattsThe 83.3°C/W for the SOT-223 package assumes theuse of the recommended footprint on a glass epoxyprinted circuit board to achieve a power dissipation of 1.5watts. There are other alternatives to achieving higherpower dissipation from the SOT-223 package. One is toincrease the area of the collector pad. By increasing thearea of the collector pad, the power dissipation can beincreased. Although the power dissipation can almost beθdoubled with this method, area is taken up on the printedcircuit board which can defeat the purpose of usingsurface mount technology. A graph of RθJA versus collectorpad area is shown in Figure 6.° ″° Figure 6. Thermal Resistance versus CollectorPad Area for the SOT-223 Package (Typical)Another alternative would be to use a ceramic substrateor an aluminum core board such as Thermal Clad. Usinga board material such as Thermal Clad, an aluminum coreboard, the power dissipation can be doubled using the samefootprint.http://onsemi.com4

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!