Chapter D Finite State Machines

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PS2 PS1SPS2PS1SaabcNS2(a)PS2 PS1S(b)efgNS1PS2 PS1hiR(c)(d)Figure 19 Circuits derived from the Encoded <strong>State</strong> Transition Tables for the Simplifieddoor-lock. (a) shows the generation of the single product term “a” contributing to the bit-2next state output NS2 and (b) shows the complete “sum of products” for the next state bit-2(NS2) output. The NS1 bit-1 output is shown in (c) and the FSM output R in (d).
Keypadinput SPS2PS1/1CINS2NS1/2LCO/ /21Outputresponse R/2clk(a)abcNS2dLPS2PS1efghNS1clkiR(b)Figure 20 Digital logic door lock example. (a) is a block-diagram of combinatorial logicelements and latch L, (b) shows the gate-level implementation of the door-lock.
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Chapter D Finite State Machines

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