Passive, active, and digital filters (3ed., CRC, 2009) - tiera.ru

16-18 Passive, Active, and Digital Filters2C+V i + – +Vo +V i + –+V og m Cg m+–V––V i o– +–V+V oi2C(a)(b)FIGURE 16.18 Integrator. The integrator capacitor may be floating (a) or grounded (b). Note that the groundedcapacitorrealization requires four times the area.C1o C2 s+V i + –+V og m g 1 o 2 C 12C–Vi– +–V oC1o2C sFIGURE 16.19Parasitic capacitors associated with a g m -C integrator.to split the integrating capacitor into two halves connected such that the parasitic bottom plate capacitors0.5C s appear at the two OTA outputs. The situation is illustrated in Figure 16.19. Taking the parasiticsinto consideration, evidently, the integrator realizesV oV i¼g msC int þ g os¼jv¼g mjvC int (1 j Q int ) =(16:29b)that is, it becomes lossy with a finite integrator quality factorand an effective integrating capacitor equal toQ int ¼ vC intg oC int ¼ C þ 1 C s2 2 þ C o(16:30a)(16:30b)To maintain the correct integration constant as nominally designed, the circuit capacitor C should bepredistorted to reflect the parasitics appearing at the integration nodes. The parasitics shouldbe estimated as best as possible, for example, from a layout process file, and their values subtractedfrom the nominal value of C in the final layout. If grounded capacitors are used as in Figure 16.18b, thebottom plate should, of course, be connected to ground so that the substrate capacitances are connectedbetween ground and the power supply. Thus, they are shorted out for the signals and play no role.Observe that the presence of parasitic capacitors tends to limit the high-frequency performance of these