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Passive, active, and digital filters (3ed., CRC, 2009) - tiera.ru

Passive, active, and digital filters (3ed., CRC, 2009) - tiera.ru

Passive, active, and digital filters (3ed., CRC, 2009) - tiera.ru

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VLSI Implementation of Digital Filters 21-7CLR A X:(R0)þ,X0 Y:(R4) ,Y0REP #NMAC X0,Y0,A X:(R0)þ,X0 Y:(R4) ,Y0RND Awhere the MAC inst<strong>ru</strong>ction retrieves data from the appropriate registers, loads it into the multiplier, <strong>and</strong>leaves the result in the accumulator. The 56001 could perform FIR filtering at a rate of one inst<strong>ru</strong>ction pertap, or 97.5 ns per tap. An IIR filter code segment used the MAC inst<strong>ru</strong>ction, as well as several others to setup the registers for the arithmetic unit, as shown below.OR #$08,MRRND A X:(R0) ,X0 Y:(R4)þ,Y0MAC Y0,X0,A X:(R0) ,X1 Y:(R4)þ,Y0MAC Y0,X1,A X1,X:(R0)þ Y:(R4)þ,Y0MAC Y0,X0,A A,X:(R0) Y:(R4),Y0MAC Y0,X1,A 1MOVE A,X:OUTPUTThe 56001 could compute a second-order IIR biquad in seven inst<strong>ru</strong>ction cycles, or 682.5 ns. Morerecent members of this family such as the DSP56L307 support FIR filter taps at an asymptotic speed of6.25 ns <strong>and</strong> IIR biquad sections at 56.25 ns.From these examples, it can be seen that general-purpose DSP processors possess many commonfeatures which make them well suited for <strong>digital</strong> filtering. The hardware MAC unit, Harvard architecture,<strong>and</strong> on-chip memory are consistent characteristics of these devices. The major shortcoming of sucharchitectures for <strong>digital</strong> filtering is the necessity to multiplex a single arithmetic unit (or very smallnumber of ALUs), which implies that sampling rates above 1=NT are not possible, where N is the numberof atomic operations (e.g., FIR filter taps) <strong>and</strong> T is the time to complete those operations.21.2.3 Future DirectionsSeveral trends have become apparent as VLSI technology has improved. One trend of note is theincreasing use of parallelism, both on-chip <strong>and</strong> between chips. The support for multiprocessorcommunications in the TI TMS320C80 provides an avenue for direct parallel implementation ofalgorithms. Architectures based upon multiple fixed-point DSP processors on a single chip have alsobeen fielded.Another trend has been the development of better programming interfaces for the general-purposechips. In particular, high level language compilers have improved to the point where they provide forreasonably good performance for complex algorithms, although still not superior to that obtained bymanual assembly language programming.This trend is being accelerated by an initiative called GNURadio (GNU Radio, 2007), which is makingit easier to implement all types of <strong>digital</strong> <strong>filters</strong> purely in software in order to enable creation of softwareradios. GNURadio provides signal processing blocks implemented in Cþþ that are connected togetherto form a complete communications system. The advantage of this software implementation is that it isgenerally hardware independent <strong>and</strong> can <strong>ru</strong>n on any general-purpose processor, opening up the world of<strong>digital</strong> implementations to anyone with a PC. The added flexibility comes at a loss of efficiency. Due tothe generalized nature of the hardware independent system, the computations will not be implemented asefficiently as they would be if written in assembly for a specific processor. An IIR filter code segment fromthe GNURadio project is shown below:

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