The C11 and C++11 Concurrency Model

80
a:W NA x=0
sb
rf
b:W NA y=0
rf
rf
int main() {
}
atomic_int x = 0;
atomic_int y = 0;
{{{ x.store(1,relaxed);
||| y.store(1,relaxed);
||| { r1 = x.load(relaxed);
r2 = (*(&y+r1-r1)).load(relaxed); }
||| { r3 = y.load(relaxed);
}}}
return 0;
r4 = (*(&x+r3-r3)).load(relaxed); }
rf
c:W RLX x=1 d:W RLX y=1 e:R RLX x=1 g:R RLX y=1
sb
f:R RLX y=0
sb
h:R RLX x=0
Each reader thread sees the writes occur in a different order. The Power and ARM
architectures allow this behaviour because they can propagate the writes to the reader
threads individually and out of order. C/C++11 also violates multi-copy atomicity here:
the execution above is allowed by the memory model. There is no speculation mechanism
to disable in C/C++11, nor is there propagation — the execution is allowed because none
of the rules of the model forbid it. Note that the dependencies in this example could be
optimised away by a C/C++11 compiler.
Write-read causality, WRC
WRC (taken from Boehm and Adve [37]), is similar to MP, in that apparent causality
implied by reading across threads is not enough to create order. This time the program
demonstrates that a reads-from edge does not order two reads from the same location:
the read on the centre thread sees the write on the first thread, whereas the read in the
right-hand thread does not.