C166/ST10 Cross-Assembler, Linker/Locator, Utilities ... - Tasking

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• • • • • • • • Assembly Language 4−7 4.3 EXTEND BLOCKS The C16x/<strong>ST10</strong> and XC16x/Super10 architectures have instructions which create extend blocks: − begin atomic sequence ATOMIC − begin extended register sequence EXTR − begin extended page sequence EXTP − begin extended page and register sequence EXTPR − begin extended segment sequence EXTS − begin extended segment and register sequence EXTSR An extend block starts after one of the extend instructions is issued and ends after the number of instructions as issued with the extend instruction. Example: EXTR #2 ; 2 extended instr. MOV PT0, #value0 ; extend SFR MOV PT1, #value1 ; extend SFR MOV PSW, #valueX ; standard SFR Branching into or from an extend block probably introduces a ’virtual extend block’. See also chapter Derivative Support. 4.4 THE SOFTWARE INSTRUCTION SET The software instruction set knows all instructions of the hardware instruction set and some additional mnemonics. These additional mnemonics are added to allow easy and comfortable programming. The hardware mnemonics that logically belong together are combined in one software mnemonic. The assembler will determine by means of the combination of operands, which opcode is entered in the instruction format. This means that based on the combination of operands the appropriate hardware mnemonic is chosen. Example ADD RL0, #3 will result in ADDB RL0, #3
4−8 LANGUAGE Software Mnemonic ADD ADDW ADDB (Integer Addition) ADDC ADDCW ADDCB (Add with Carry) CPL CPLW CPLB (1’s complement) NEG NEGW NEGB (2’s complement) SUB SUBW SUBB (Subtraction) SUBC SUBCW SUBCB (Subtraction with Carry) AND ANDW ANDB (Logical And) BAND (Bit Logical And) Chapter 4 Hardware Mnemonic Operation Type CMP CMPW (Compare Integer) CMPB BCMP (Bit−to−Bit Compare) MOV MOVW (Move Data) MOVB BMOV (Bit−to−Bit Move) OR ORW (Logical Or) ORB BOR (Bit Logical Or) XOR XORW (Logical Exclusive Or) XORB BXOR (Bit Logical Exclusive Or) CALL CALLA CALLI CALLR CALLS Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Bit Word Byte Bit Word Byte Bit Word Byte Bit Word Byte Bit Absolute Indirect Relative Inter−segment
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C166/ST10 v8.7 MA019−000−00−0
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The information in this document ha
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IV CONTENTS CONTENTS Table of Conte
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VI CONTENTS Table of Contents 1.7.4
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VIII CONTENTS Table of Contents 2.7
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X CONTENTS Table of Contents ASSEMB
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XII CONTENTS Table of Contents 10.6
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XIV CONTENTS Table of Contents LINK
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XVI MANUAL STRUCTURE Manual Purpose
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XVIII MANUAL STRUCTURE RELATED PUBL
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XX MANUAL STRUCTURE Manual Purpose
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1−2 CONCEPT CHAPTER 1 Chapter 1
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1−4 CONCEPT Chapter 1 Ease of Deb
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1−6 CONCEPT Chapter 1 Classes Com
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1−8 CONCEPT In support of the pro
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1−10 CONCEPT 1.3 INTERRUPT CONCEP
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1−12 CONCEPT 1.4.2 SOFTWARE SUPPO
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1−14 CONCEPT Example: TSKPROC PRO
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1−16 CONCEPT Chapter 1 To permit
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1−18 CONCEPT 1.4.4.2 COMMON SECTI
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1−20 CONCEPT 1.5 THE FLAT INTERRU
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1−22 CONCEPT The Flat Interrupt c
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1−24 CONCEPT 1.6.1.1 ATTRIBUTES O
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1−26 CONCEPT 1.6.3 THE TERM ’CL
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1−28 CONCEPT Chapter 1 The SEGMEN
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1−30 CONCEPT Sections: Type Appro
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1−32 CONCEPT Map example III Usin
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1−34 CONCEPT 1.8 REGISTERS Chapte
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1−36 CONCEPT Chapter 1 As a resul
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1−38 CONCEPT 1.9 USE OF THE PEC (
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1−40 CONCEPT Example: Chapter 1 M
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1−42 CONCEPT or label: instructio
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1−44 CONCEPT 1.10.3 CONSTANTS Cha
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1−46 CONCEPT 1.11 SCOPES OF SYMBO
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1−48 CONCEPT Chapter 1
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2−2 MACRO PREPROCESSOR CHAPTER 2
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2−4 MACRO PREPROCESSOR Chapter 2
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2−6 MACRO PREPROCESSOR 2.4 M166 C
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2−8 MACRO PREPROCESSOR 2.4.2 DESC
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2−10 MACRO PREPROCESSOR DATE Cont
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2−12 MACRO PREPROCESSOR Chapter 2
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2−16 MACRO PREPROCESSOR INCLUDE C
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2−18 MACRO PREPROCESSOR LINE Cont
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2−22 MACRO PREPROCESSOR PAGING Co
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2−24 MACRO PREPROCESSOR SAVE/REST
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2−26 MACRO PREPROCESSOR TITLE Con
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2−28 MACRO PREPROCESSOR 2.5 CREAT
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2−30 MACRO PREPROCESSOR Example:
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2−32 MACRO PREPROCESSOR Example 4
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2−34 MACRO PREPROCESSOR 2.5.2 CRE
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6−24 CONTROLS CHECKCPU16 Control:
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6−34 CONTROLS Chapter 6 Example:
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6−36 CONTROLS CHECKMULDIV Control
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6−40 CONTROLS EJECT Control: EJEC
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6−42 CONTROLS EXPANDREGBANK Contr
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6−44 CONTROLS EXTEND / EXTEND1 /
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6−46 CONTROLS EXTPEC16 Control: F
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6−48 CONTROLS Example: a166 x.src
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6−50 CONTROLS GSO Control: From t
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6−58 CONTROLS MOD166 Control: MOD
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6−66 CONTROLS Chapter 6 Examples:
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6−68 CONTROLS RETCHECK Control: F
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6−70 CONTROLS SAVE / RESTORE Cont
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6−84 CONTROLS Chapter 6
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7−2 DIRECTIVES CHAPTER 7 Chapter
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7−4 DIRECTIVES Directive Descript
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7−6 DIRECTIVES ?FILE Synopsis: ?F
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7−8 DIRECTIVES ASSUME Synopsis: A
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7−10 DIRECTIVES Chapter 7 This ke
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7−12 DIRECTIVES Chapter 7 Example
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7−18 DIRECTIVES Chapter 7 DW Init
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7−22 DIRECTIVES Chapter 7 DBFILL/
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7−26 DIRECTIVES − Bit−address
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7−28 DIRECTIVES Chapter 7 init DS
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7−30 DIRECTIVES END Synopsis: END
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7−32 DIRECTIVES EVEN Synopsis: EV
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7−34 DIRECTIVES Example: Module A
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7−36 DIRECTIVES GLOBAL Synopsis:
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7−46 DIRECTIVES Chapter 7 The C16
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7−54 DIRECTIVES Chapter 7 REGDEF
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7−56 DIRECTIVES The three resulti
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7−58 DIRECTIVES SECTION/ENDS Syno
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7−60 DIRECTIVES Align Type Descri
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7−62 DIRECTIVES Combine Type Desc
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7−64 DIRECTIVES SSKDEF Synopsis:
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8−4 DERIVATIVES Chapter 8 Instruc
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8−6 DERIVATIVES Chapter 8 Because
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9−2 LINKER/LOCATOR CHAPTER 9 Chap
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9−4 LINKER/LOCATOR 9.2.1 LINKER/L
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9−72 LINKER/LOCATOR LOCALS Contro
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9−78 LINKER/LOCATOR MISRAC Contro
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9−104 LINKER/LOCATOR PURGE Contro
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10−2 UTILITIES CHAPTER 10 Chapter
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10−30 UTILITIES 10.6.3 MEMORY SPA
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10−42 UTILITIES 10.6.11 EXAMPLE M
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10−62 UTILITIES Example: l166 @
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10−64 UTILITIES 10.10 SREC166 Cha
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10−66 UTILITIES −nt No output o
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A−2 A.OUT APPENDIX A Appendix A
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A−4 A.OUT Identifier Strings Exte
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A−6 A.OUT Appendix A os_foff A lo
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A−8 A.OUT Appendix A on_u A union
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A−10 A.OUT Extension Header The e
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A−12 A.OUT 2 FORMAT OF A.OUT FILE
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A−14 A.OUT struct outsect { long
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A−16 A.OUT struct outname { union
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A−18 A.OUT Appendix A /* * Alloca
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A−20 A.OUT union eseg { struct ex
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A−22 A.OUT Appendix A
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B−2 M166 OUTPUT APPENDIX B Append
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B−4 M166 OUTPUT The macro @RDF ha
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B−6 M166 OUTPUT Example: Appendix
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B−8 M166 OUTPUT Appendix B
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C−2 ASSEMBLER OUTPUT APPENDIX C A
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C−4 ASSEMBLER OUTPUT 1.2 SOURCE L
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C−6 ASSEMBLER OUTPUT results in t
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C−8 ASSEMBLER OUTPUT Algn The sec
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C−10 ASSEMBLER OUTPUT Symbols: Na
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C−12 ASSEMBLER OUTPUT 1.6 REGISTE
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C−14 ASSEMBLER OUTPUT Appendix C
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D−2 LINKER/LOCATOR OUTPUT APPENDI
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D−4 LINKER/LOCATOR OUTPUT The sec
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D−6 LINKER/LOCATOR OUTPUT Algn Th
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D−8 LINKER/LOCATOR OUTPUT 1.4 INT
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D−10 LINKER/LOCATOR OUTPUT 1.6 RE
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D−12 LINKER/LOCATOR OUTPUT Append
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E−2 GSO166 ERRORS APPENDIX E Appe
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E−4 GSO166 ERRORS F 015: missing
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E−6 GSO166 ERRORS Appendix E W 03
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E−8 GSO166 ERRORS Appendix E
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F−2 M166 ERRORS APPENDIX F Append
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F−4 M166 ERRORS Appendix F W 107:
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F−6 M166 ERRORS E 225: Include fi
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F−8 M166 ERRORS E 267: Error in e
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F−10 M166 ERRORS F 306: read erro
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G−2 A166 ERRORS APPENDIX G Append
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G−4 A166 ERRORS Appendix G W 110:
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G−6 A166 ERRORS W 137: no procedu
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G−8 A166 ERRORS Appendix G 2. And
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G−10 A166 ERRORS Appendix G W 165
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G−18 A166 ERRORS E 237: section t
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G−20 A166 ERRORS E 267: a relocat
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G−22 A166 ERRORS E 291: only NEAR
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G−24 A166 ERRORS Appendix G E 328
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G−32 A166 ERRORS 4 FATAL ERRORS (
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G−34 A166 ERRORS Appendix G
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H−2 L166 ERRORS APPENDIX H Append
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H−4 L166 ERRORS Appendix H W 109:
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H−10 L166 ERRORS Appendix H W 160
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H−18 L166 ERRORS Appendix H Using
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H−20 L166 ERRORS Appendix H E 223
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H−34 L166 ERRORS Appendix H F 315
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H−36 L166 ERRORS Appendix H F 336
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I−2 CC166 ERRORS APPENDIX I Appen
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I−4 CC166 ERRORS E 17: missing in
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J−2 MK166 ERRORS APPENDIX J Appen
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J−4 MK166 ERRORS chdir: current w
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J−6 MK166 ERRORS Appendix J rules
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K−2 LIMITS APPENDIX K Appendix K
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K−4 LIMITS Appendix K
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L−2 INTEL HEX APPENDIX L Appendix
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L−4 INTEL HEX Byte Type Record ty
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L−6 INTEL HEX Data Record The Dat
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L−8 INTEL HEX Appendix L
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M−2 MOTOROLA S APPENDIX M Appendi
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M−4 MOTOROLA S Appendix M S1 −
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M−6 MOTOROLA S S3 − record With
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Index−2 INDEX INDEX Index
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Index−4 INDEX header/noheader, 6
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Index−6 INDEX checkc166sv1extseq,
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Index−8 INDEX dword alignment, 7
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Index−10 INDEX iramsize, 8−6 lo
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Index−12 INDEX low, 5−22 lts fu
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Index−14 INDEX multiple definitio
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Index−16 INDEX pagelength a166 co
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Index−18 INDEX stricttask a166 co
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Index−20 INDEX Index
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