C166/ST10 Cross-Assembler, Linker/Locator, Utilities ... - Tasking

6−26
CONTROLS
CHECKCPU21
Control:
Chapter 6
From the Project menu, select Project Options...
Expand the Application entry, expand the Processor entry and select
CPU Problem Bypasses and Checks. Enable the CPU.21 −− Incorrect
result of BFLDL/BFLDH after a write to internal RAM check box.
CHECKCPU21 / NOCHECKCPU21
Abbreviation:
CPU21 / NOCPU21
Class:
General
Default:
NOCHECKCPU21
Description:
Infineon regularly publishes microcontroller errata sheets for reporting
CPU functional problems. With the CHECKCPU21 control the assembler
checks for the CPU.21 silicon problem and issues warnings and errors:
• an error when the previous operation writes to a register (including
post increment, pre increment, post decrement and pre decrement)
whose 8 bit address equals the appropiate field in the BFLDx
operation.
• a warning if the previous operation writes to a register and the BFLDx
instruction has a relocatable value in the concerned field.
• a warning if the previous instruction uses indirect addressing or
executes an implicit stack write a warning if the previous instruction
writes to IRAM and the BFLDx field is relocatable or larger than 0xEF.
• a warning if the previous instruction writes to bit addressable IRAM
(including writing to a register) and the BFLDx field is relocatable or
smaller than 0xF0.
• a warning if the BFLDx instruction is not protected by ATOMIC, EXTR,
EXTP, EXTPR, EXTS or EXTSR, which means a PEC transfer may occur
just before the execution of BFLDx. If the NOPEC control is effective
for this BFLDx instruction, no warning will be given.