datasheet: pdf - svn
datasheet: pdf - svn
datasheet: pdf - svn
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NXP Semiconductors HEF4094B<br />
4. Functional diagram<br />
2<br />
3<br />
1<br />
15<br />
D<br />
CP<br />
STR<br />
OE<br />
QP0<br />
8-STAGE SHIFT<br />
REGISTER<br />
8-BIT STORAGE<br />
REGISTER<br />
3-STATE OUTPUTS<br />
4 5 6 7 14 13 12 11<br />
001aaf119<br />
Fig 1. Functional diagram Fig 2. Logic symbol<br />
D<br />
CP<br />
STR<br />
OE<br />
Fig 3. Logic diagram<br />
QS2<br />
QS1<br />
QP1 QP2 QP3 QP4 QP5 QP6 QP7<br />
10<br />
9<br />
STAGE 0 STAGES 1 TO 6<br />
STAGE 7<br />
D<br />
CP<br />
D<br />
CP<br />
FF 0<br />
Q<br />
Q<br />
LATCH 0<br />
QP0<br />
D<br />
CP<br />
8-stage shift-and-store bus register<br />
HEF4094B_4 © NXP B.V. 2008. All rights reserved.<br />
Product data sheet Rev. 04 — 30 October 2008 2 of 17<br />
D<br />
2<br />
CP<br />
D<br />
CP<br />
FF 7<br />
Q<br />
Q<br />
LATCH 7<br />
QP2 QP4 QP6<br />
QP1 QP3 QP5 QP7<br />
Q<br />
D<br />
3 1<br />
CP STR<br />
OE<br />
15<br />
QS1<br />
QS2<br />
QP0<br />
QP1<br />
QP2<br />
QP3<br />
QP4<br />
QP5<br />
QP6<br />
QP7<br />
001aag799<br />
9<br />
10<br />
4<br />
5<br />
6<br />
7<br />
14<br />
13<br />
12<br />
11<br />
001aaf111<br />
QS1<br />
D Q QS2<br />
CP<br />
LATCH
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