PSoC™ Mixed-Signal Array Final Data Sheet - svn

CY8C29x66 Final Data Sheet 4. Packaging Information
4.2 Thermal Impedances
Table 4-1. Thermal Impedances per Package
* T J = T A + POWER x θ JA
Package Typical θ JA *
28 PDIP 69 o C/W
28 SSOP 94 o C/W
28 SOIC 67 o C/W
44 TQFP 60 o C/W
48 SSOP 69 o C/W
48 MLF 28 o C/W
100 TQFP 50 o C/W
4.3 Capacitance on Crystal Pins
Table 4-2: Typical Package Capacitance on Crystal Pins
Package Package Capacitance
28 PDIP 3.5 pF
28 SSOP 2.8 pF
28 SOIC 2.7 pF
44 TQFP 2.6 pF
48 SSOP 3.3 pF
48 MLF 1.8 pF
100 TQFP 3.1 pF
4.4 Solder Reflow Peak Temperature
Following is the minimum solder reflow peak temperature to achieve good solderability.
Table 4-3. Solder Reflow Peak Temperature
Package Minimum Peak Temperature* Maximum Peak Temperature
28 PDIP 220 o C 260 o C
28 SSOP 240 o C 260 o C
28 SOIC 220 o C 260 o C
44 TQFP 220 o C 260 o C
48 SSOP 220 o C 260 o C
48 MLF 220 o C 260 o C
100 TQFP 220 o C 260 o C
*Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220+/-5 o C
with Sn-Pb or 245+/-5 o C with Sn-Ag-Cu paste. Refer to the solder manufacturer specifications.
November 12, 2004 Document No. 38-12013 Rev. *G 40