MPC5668x Data Sheet - Freescale Semiconductor

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$Set of General Math and Motor Control Functions for ARM Cortex ...$

Pin assignments Pin Name 1 14 Supported Functions 2 PD9 PD[9] CNRX_E RXD_L SDA_C PD10 PD[10] CNTX_F TXD_M SCL_D PD11 PD[11] CNRX_F RXD_M SDA_D PD12 PD[12] TXD_A PD13 PD[13] RXD_A PD14 PD[14] TXD_B PD15 PD[15] RXD_B PE0 PE[0] TXD_C eMIOS[31] PE1 PE[1] RXD_C eMIOS[30] PE2 PE[2] TXD_D eMIOS[29] GPIO (PCR) Num 3 PA 4 57 00 01 10 11 58 00 01 10 11 59 00 01 10 11 60 00 01 10 11 61 00 01 10 11 62 00 01 10 11 63 00 01 10 11 64 00 01 10 11 65 00 01 10 11 66 00 01 10 11 Table 3. PXN20 signal properties (continued) Description Port D GPIO FlexCAN_E Receive SCI_L Receive I 2 C_C Serial Data Port D GPIO FlexCAN_F Transmit SCI_M Transmit I 2 C_D Serial Clock Port D GPIO FlexCAN_F Receive SCI_M Receive I 2 C_D Serial Data Port D GPIO eSCI_A Transmit — — Port D GPIO eSCI_A Receive — — Port D GPIO eSCI_B Transmit — — Port D GPIO eSCI_B Receive — — Port E GPIO eSCI_C Transmit eMIOS Channel — Port E GPIO eSCI_C Receive eMIOS Channel — Port E GPIO eSCI_D Transmit eMIOS Channel — Port E (16) I/O Type I/O I I I/O I/O O O I/O I/O I I I/O I/O O — — I/O I — — I/O O — — I/O I — — I/O O I/O — I/O I I/O I/O O I/O Volt- age PXN20 Microcontroller Data Sheet, Rev. 1 Pad Type 5 During Reset 6 Status After Reset 7 Package Pin Locations 208 BGA V DDE2 SH — — F1 V DDE2 SH — — F2 V DDE2 SH — — G1 V DDE2 SH — — G2 V DDE2 SH — — H1 V DDE2 SH — — C3 V DDE2 SH — — D3 V DDE2 SH — — E3 V DDE2 SH — — E4 V DDE2 SH — — F4 Freescale Semiconductor
Pin Name 1 Supported Functions 2 PE3 PE[3] RXD_D eMIOS[28] PE4 PE[4] TXD_E eMIOS[27] PE5 PE[5] RXD_E eMIOS[26] PE6 PE[6] TXD_F eMIOS[25] PE7 PE[7] RXD_F eMIOS[24] PE8 PE[8] TXD_G PCS_A[1] PE9 PE[9] RXD_G PCS_A[4] PE10 PE[10] TXD_H PCS_B[3] PE11 PE[11] RXD_H PCS_B[2] PE12 PE[12] TXD_J PCS_C[5] PE13 PE[13] RXD_J PCS_C[3] GPIO (PCR) Num 3 PA 4 67 00 01 10 11 68 00 01 10 11 69 00 01 10 11 70 00 01 10 11 71 00 01 10 11 72 00 01 10 11 73 00 01 10 11 74 00 01 10 11 75 00 01 10 11 76 00 01 10 11 77 00 01 10 11 Table 3. PXN20 signal properties (continued) Description Port E GPIO eSCI_D Receive eMIOS Channel — Port E GPIO eSCI_E Transmit eMIOS Channel — Port E GPIO eSCI_E Receive eMIOS Channel — Port E GPIO eSCI_F Transmit eMIOS Channel — Port E GPIO eSCI_F Receive eMIOS Channel — Port E GPIO eSCI_G Transmit DSPI_A Peripheral Chip Select — Port E GPIO eSCI_G Receive DSPI_A Peripheral Chip Select — Port E GPIO eSCI_H Transmit DSPI_B Peripheral Chip Select — Port E GPIO eSCI_H Receive DSPI_B Peripheral Chip Select — Port E GPIO eSCI_J Transmit DSPI_C Peripheral Chip Select — Port E GPIO eSCI_J Receive DSPI_C Peripheral Chip Select — PXN20 Microcontroller Data Sheet, Rev. 1 Pin assignments Freescale Semiconductor 15 I/O Type I/O I I/O I/O O I/O I/O I I/O I/O O I/O I/O I I/O I/O O O I/O I O I/O O O I/O I O I/O O O I/O I O Volt- age Pad Type 5 During Reset 6 Status After Reset 7 Package Pin Locations 208 BGA V DDE2 SH — — F3 V DDE2 SH — — G3 V DDE2 SH — — H3 V DDE2 SH — — M2 V DDE2 SH — — L2 V DDE2 SH — — J4 V DDE2 SH — — M4 V DDE2 SH — — N3 V DDE2 SH — — N4 V DDE2 SH — — P4 V DDE2 SH — — P5
Page 1 and 2: Freescale Semiconductor Data Sheet:
Page 3 and 4: 1 Ordering information 1.1 Orderabl
Page 5 and 6: 2 PXN20 block diagrams Figure 2 sho
Page 7 and 8: 3 Pin assignments 3.1 208-ball MAPB
Page 9 and 10: Pin Name 1 PA6 PA[6] AN[6] PA7 PA[7
Page 11 and 12: Pin Name 1 Supported Functions 2 PB
Page 13: Pin Name 1 Supported Functions 2 PC
Page 17 and 18: Pin Name 1 Supported Functions 2 PF
Page 19 and 20: Pin Name 1 Supported Functions 2 PG
Page 21 and 22: Pin Name 1 Supported Functions 2 PJ
Page 23 and 24: Pin Name 1 Supported Functions 2 PK
Page 25 and 26: 3.2.1 Power and ground supply summa
Page 27 and 28: 4.2 Thermal characteristics PXN20 M
Page 29 and 30: PXN20 Microcontroller Data Sheet, R
Page 31 and 32: 6 3.3-5.0 V External I/O Supply Vol
Page 33 and 34: 5 VDDSYN Current VDD33 @ 3.0V-3.6V
Page 35 and 36: 4.7.1 I/O pad V DD33 current specif
Page 37 and 38: 8 Crystal manufacturer’s recommen
Page 39 and 40: 4.11 ADC electrical characteristics
Page 41 and 42: Spec Pad Type 2 2 Medium 00 01 11 P
Page 43 and 44: 4.14 AC timing 4.14.1 Reset and boo
Page 45 and 46: TCK TMS, TDI TDO TCK JCOMP 4 5 7 8
Page 47 and 48: 4.14.4 Enhanced Modular I/O Subsyst
Page 49 and 50: SIN PCSx SCK Output (CPOL = 0) SCK
Page 51 and 52: PCSx SCK Output (CPOL = 0) SCK Outp
Page 53 and 54: 4.14.6 MLB Interface 4.14.6.1 Media
Page 55 and 56: Figure 23. Media Local Bus (MLB) ti
Page 57 and 58: Figure 26. MII async inputs timing
Page 59 and 60: Figure 29. 208 MAPBGA package detai

MPC5668x Data Sheet - Freescale Semiconductor

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