MPC5668x Data Sheet - Freescale Semiconductor

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$Set of General Math and Motor Control Functions for ARM Cortex ...$

Pin assignments Pin Name 1 20 Supported Functions 2 PH7 PH[7] eMIOS[24] FEC_RXD[3] PH8 PH[8] eMIOS[23] PH9 PH[9] eMIOS[22] PH10 PH[10] eMIOS[21] PH11 PH[11] eMIOS[20] PH12 PH[12] eMIOS[19] PH13 PH[13] eMIOS[18] PH14 PH[14] eMIOS[17] PH15 PH[15] eMIOS[16] PJ0 PJ[0] eMIOS[15] PCS_A[4] GPIO (PCR) Num 3 PA 4 119 00 01 10 11 120 00 01 10 11 121 00 01 10 11 122 00 01 10 11 123 00 01 10 11 124 00 01 10 11 125 00 01 10 11 126 00 01 10 11 127 00 01 10 11 128 00 01 10 11 Table 3. PXN20 signal properties (continued) Description Port H GPIO eMIOS Channel Ethernet Receive Data — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port H GPIO eMIOS Channel — — Port J (16) Port J GPIO eMIOS Channel DSPI_A Peripheral Chip Select — I/O Type I/O I/O I — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O O — Volt- age PXN20 Microcontroller Data Sheet, Rev. 1 Pad Type 5 During Reset 6 Status After Reset 7 Package Pin Locations 208 BGA V DDE3 SH — — T15 V DDE4 SH — — P7 V DDE4 SH — — N8 V DDE4 SH — — P8 V DDE4 SH — — N9 V DDE4 SH — — P9 V DDE4 SH — — P10 V DDE4 SH — — P11 V DDE4 SH — — N11 V DDE4 SH — — R7 Freescale Semiconductor
Pin Name 1 Supported Functions 2 PJ1 PJ[1] eMIOS[14] PCS_A[5] PJ2 PJ[2] eMIOS[13] PCS_B[1] PJ3 PJ[3] eMIOS[12] PCS_B[2] PJ4 PJ[4] eMIOS[11] PCS_C[3] PJ5 PJ[5] eMIOS[10] PCS_C[4] PJ6 PJ[6] eMIOS[09] PCS_D[5] PJ7 PJ[7] eMIOS[08] PCS_D[1] PJ8 PJ[8] eMIOS[07] PJ9 PJ[9] eMIOS[06] PJ10 PJ[10] eMIOS[05] PJ11 PJ[11] eMIOS[04] GPIO (PCR) Num 3 PA 4 129 00 01 10 11 130 00 01 10 11 131 00 01 10 11 132 00 01 10 11 133 00 01 10 11 134 00 01 10 11 135 00 01 10 11 136 00 01 10 11 137 00 01 10 11 138 00 01 10 11 139 00 01 10 11 Table 3. PXN20 signal properties (continued) Description Port J GPIO eMIOS Channel DSPI_A Peripheral Chip Select — Port J GPIO eMIOS Channel DSPI_B Peripheral Chip Select — Port J GPIO eMIOS Channel DSPI_B Peripheral Chip Select — Port J GPIO eMIOS Channel DSPI_C Peripheral Chip Select — Port J GPIO eMIOS Channel DSPI_C Peripheral Chip Select — Port J GPIO eMIOS Channel DSPI_D Peripheral Chip Select — Port J GPIO eMIOS Channel DSPI_D Peripheral Chip Select — Port J GPIO eMIOS Channel — — Port J GPIO eMIOS Channel — — Port J GPIO eMIOS Channel — — Port J GPIO eMIOS Channel — — PXN20 Microcontroller Data Sheet, Rev. 1 Pin assignments Freescale Semiconductor 21 I/O Type I/O I/O O — I/O I/O O — I/O I/O O — I/O I/O O — I/O I/O O — I/O I/O O — I/O I/O O — I/O I/O — — I/O I/O — — I/O I/O — — I/O I/O — — Volt- age Pad Type 5 During Reset 6 Status After Reset 7 Package Pin Locations 208 BGA V DDE4 SH — — T7 V DDE4 SH — — R8 V DDE4 SH — — T8 V DDE4 SH — — R9 V DDE4 SH — — T9 V DDE4 SH — — R10 V DDE4 SH — — T10 V DDE4 SH — — T11 V DDE4 SH — — R11 V DDE4 SH — — N12 V DDE4 SH — — P12
Page 1 and 2: Freescale Semiconductor Data Sheet:
Page 3 and 4: 1 Ordering information 1.1 Orderabl
Page 5 and 6: 2 PXN20 block diagrams Figure 2 sho
Page 7 and 8: 3 Pin assignments 3.1 208-ball MAPB
Page 9 and 10: Pin Name 1 PA6 PA[6] AN[6] PA7 PA[7
Page 11 and 12: Pin Name 1 Supported Functions 2 PB
Page 13 and 14: Pin Name 1 Supported Functions 2 PC
Page 15 and 16: Pin Name 1 Supported Functions 2 PE
Page 17 and 18: Pin Name 1 Supported Functions 2 PF
Page 19: Pin Name 1 Supported Functions 2 PG
Page 23 and 24: Pin Name 1 Supported Functions 2 PK
Page 25 and 26: 3.2.1 Power and ground supply summa
Page 27 and 28: 4.2 Thermal characteristics PXN20 M
Page 29 and 30: PXN20 Microcontroller Data Sheet, R
Page 31 and 32: 6 3.3-5.0 V External I/O Supply Vol
Page 33 and 34: 5 VDDSYN Current VDD33 @ 3.0V-3.6V
Page 35 and 36: 4.7.1 I/O pad V DD33 current specif
Page 37 and 38: 8 Crystal manufacturer’s recommen
Page 39 and 40: 4.11 ADC electrical characteristics
Page 41 and 42: Spec Pad Type 2 2 Medium 00 01 11 P
Page 43 and 44: 4.14 AC timing 4.14.1 Reset and boo
Page 45 and 46: TCK TMS, TDI TDO TCK JCOMP 4 5 7 8
Page 47 and 48: 4.14.4 Enhanced Modular I/O Subsyst
Page 49 and 50: SIN PCSx SCK Output (CPOL = 0) SCK
Page 51 and 52: PCSx SCK Output (CPOL = 0) SCK Outp
Page 53 and 54: 4.14.6 MLB Interface 4.14.6.1 Media
Page 55 and 56: Figure 23. Media Local Bus (MLB) ti
Page 57 and 58: Figure 26. MII async inputs timing
Page 59 and 60: Figure 29. 208 MAPBGA package detai

MPC5668x Data Sheet - Freescale Semiconductor

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