MPC5668x Data Sheet - Freescale Semiconductor

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$Set of General Math and Motor Control Functions for ARM Cortex ...$

Ordering information 4 Table 2. PXN20 family feature set (continued) Feature PXN20 PXN21 CPU Execution Speed Static, 116 MHz Static, 116 MHz Input/Output Processor (IOP) e200z0 e200z0 IOP Execution Speed 1/2 CPU execution speed 1/2 CPU execution speed Flash with ECC 2 MB 2 MB Data Flash Block 8x16 KB 8x16 KB RAM with ECC 592 KB 128 KB Memory Protection Unit (MPU) No 16 entry Direct Memory Access Unit (eDMA) 16 Channel 32 Channel Ethernet (FEC) Yes No MediaLB (MLB-DIM) Yes No FlexRay Controller Yes (128 Message Buffers) No Analog-to-Digital Converter (ADC) 36 internal channels, 10-bit Supports 32 external channels PXN20 Microcontroller Data Sheet, Rev. 1 64 internal channels, 10-bit Supports 32 external channels Total Timer I/O (eMIOS200) 24 channels, 16-bit 32 channels, 16-bit Cross Trigger Unit (CTU) No Yes Asynchronous Serial Interfaces (UART) 6 12 Synchronous Serial Interfaces (SPI) 4 4 Controller Area Network (CAN) Controller 6 5 Inter-Integrated Circuit (I 2 C) Controller 4 4 Frequency Modulated PLL (FMPLL) Yes Yes 4 – 40 MHz XTAL Oscillator Yes Yes 16 MHz IRC Oscillator Yes Yes 32 kHz XTAL Oscillator Yes Yes 128 kHz IRC Oscillator Yes Yes Real Time Counter/ Autonomous Periodic Interrupts (RTC/API) Yes Yes Periodic Interrupt Timer (PIT) 8 8 System Timer Module (STM) Yes Yes Software Watchdog Timer (SWT) Yes Yes General-Purpose I/O (GPIO) 155 155 Clock Monitor (FMPLL) Yes Yes JTAG Yes Yes Nexus Debug (Only supported on emulation package) Nexus3 (e200Z6) Nexus2+ (e200Z0) Nexus3 (e200Z6) Nexus2+ (e200Z0) Production Package 208 MAPBGA 208 MAPBGA Emulation Package (for development use only) 256 MAPBGA 256 MAPBGA Freescale Semiconductor
2 PXN20 block diagrams Figure 2 shows a top-level block diagram of the PXN20 device. PXN20 Block Diagram Debug JTAG Nexus3 (Z6) Nexus2+ (Z0) e200z0 Core VLE 2 MB Flash (ECC) ECSM Masters e200z650 Core VLE MMU (32 TLB) FPU/SPE 32 KB Cache 4/8 Way 6 x UART/LIN 36 x ADC 24 x eMIOS PBRIDGE B 16-ch DMA Mux 32 kHz XTAL 128 kHz IRC Crossbar Switch (XBAR) 2 x I 2 C 2 x SPI 6 x CAN ADC – Analog-to-digital converter BAM – Boot assist module CAN – Controller area network controller ECC – Error correction code ECSM – Error correction status module eMIOS – Timed input/output eDMA – Enhanced direct memory access controller FEC – Fast ethernet controller FlexRay – FlexRay bus controller FMPLL – Frequency-modulated phase-locked loop I 2 C – Inter-integrated circuit controller INTC – Interrupt controller JTAG – Joint Test Action Group interface Figure 2. PXN20 block diagram 4-40 MHz XTAL FMPLL Semaphores PXN20 Microcontroller Data Sheet, Rev. 1 16 MHz IRC Ethernet MLB-DIM FlexRay PBRIDGE A 2 x SPI 2 x I 2 C 80 KB SRAM (ECC) ECSM PXN20 block diagrams 512 KB SRAM (ECC) Standby RAM ECSM VREG Controller RTC/API Freescale Semiconductor 5 SWT STM INTC PIT BAM SIU MLB-DIM – Media Local Bus device interface module NDI – Nexus debug interface PBRIDGE– Peripheral I/O bridge PIT – Periodic interrupt timer RTC – Real time clock SIU – System integration unit SPI – Serial peripheral interface controller STM – System timer module SWT – Software watchdog timer UART/LIN – Universal asynchronous receiver/transmitter/ local interconnect network VREG – Voltage regator
Page 1 and 2: Freescale Semiconductor Data Sheet:
Page 3: 1 Ordering information 1.1 Orderabl
Page 7 and 8: 3 Pin assignments 3.1 208-ball MAPB
Page 9 and 10: Pin Name 1 PA6 PA[6] AN[6] PA7 PA[7
Page 11 and 12: Pin Name 1 Supported Functions 2 PB
Page 13 and 14: Pin Name 1 Supported Functions 2 PC
Page 15 and 16: Pin Name 1 Supported Functions 2 PE
Page 17 and 18: Pin Name 1 Supported Functions 2 PF
Page 19 and 20: Pin Name 1 Supported Functions 2 PG
Page 21 and 22: Pin Name 1 Supported Functions 2 PJ
Page 23 and 24: Pin Name 1 Supported Functions 2 PK
Page 25 and 26: 3.2.1 Power and ground supply summa
Page 27 and 28: 4.2 Thermal characteristics PXN20 M
Page 29 and 30: PXN20 Microcontroller Data Sheet, R
Page 31 and 32: 6 3.3-5.0 V External I/O Supply Vol
Page 33 and 34: 5 VDDSYN Current VDD33 @ 3.0V-3.6V
Page 35 and 36: 4.7.1 I/O pad V DD33 current specif
Page 37 and 38: 8 Crystal manufacturer’s recommen
Page 39 and 40: 4.11 ADC electrical characteristics
Page 41 and 42: Spec Pad Type 2 2 Medium 00 01 11 P
Page 43 and 44: 4.14 AC timing 4.14.1 Reset and boo
Page 45 and 46: TCK TMS, TDI TDO TCK JCOMP 4 5 7 8
Page 47 and 48: 4.14.4 Enhanced Modular I/O Subsyst
Page 49 and 50: SIN PCSx SCK Output (CPOL = 0) SCK
Page 51 and 52: PCSx SCK Output (CPOL = 0) SCK Outp
Page 53 and 54: 4.14.6 MLB Interface 4.14.6.1 Media
Page 55 and 56:
Figure 23. Media Local Bus (MLB) ti
Page 57 and 58:
Figure 26. MII async inputs timing
Page 59 and 60:
Figure 29. 208 MAPBGA package detai
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MPC5668x Data Sheet - Freescale Semiconductor

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