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Configuring Target Hardware Preparing the BSC9131/G1110 RDB Board a. Remove the development system’s cover to expose the P4080DS board. Figure 2.4 P4080DS Board b. Connect the USB TAP’s ribbon cable to the P4080 board’s legacy JTAG/COP connector. (Refer to the figure above.) NOTE Ensure that pin 1 of the USB TAP cable is aligned with pin 1 of the board’s JTAG/COP connector. c. Connect the USB TAP’s USB cable to your PC. 5. Power up the P4080DS desktop development system. Legacy JTAG/COP connector 2.4 Preparing the BSC9131/G1110 RDB Board 1. Ensure that board is not connected to the power. 2. Ensure that the power to the chassis or the standalone power supply is OFF. 14 Power Architecture® Processors Getting Started Guide
Power Architecture® Processors Getting Started Guide Configuring Target Hardware Preparing the BSC9131/G1110 RDB Board NOTE It is recommended you wear a wrist strap before handling the BSC9131/G1110 RDB board to protect the board from electrical charges. Figure 2.5 BSC9131/G1110 RDB Board 3. Check the default switch positions and verify the board is operational, before changing the switches. The BSC9131 RDB board has dedicated switches controlling the JTAG topology configuration - whether the StarCore and Power Architecture TAPs are daisy chained or accessed separately from the JTAG ports. For the dual TAP mode on Power Architecture JTAG port (the Power Architecture TAP and DSP TAP are daisy chained and accessed from the Power Architecture JTAG port; the DSP JTAG port is not used), set the on-board dipswitch SW6[3:4] to ON/ON (CFG_JTAG_MODE[0:1] = 00). For the single TAP mode through primary JTAG header (Power Architecture TAP is accessed from the Power Architecture JTAG port; the DSP TAP and DSP JTAG port are not used), set the onboard dipswitch SW6[3:4] to OFF/ON (CFG_JTAG_MODE[0:1] = 10). For the single TAP per JTAG port mode (Power Architecture TAP is accessed from the Power Architecture JTAG port, DSP TAP is accessed from the DSP JTAG port), set the onboard dipswitch SW6[3:4] to OFF/OFF (CFG_JTAG_MODE[0:1] = 11). 15
Page 1 and 2: CodeWarrior Development Studio for
Page 3 and 4: Table of Contents 1 Introduction 5
Page 5 and 6: Introduction This Getting Started g
Page 7 and 8: Power Architecture® Processors Get
Page 9 and 10: Configuring Target Hardware This ch
Page 11 and 12: Figure 2.1 B4860QDS Board Power Arc
Page 13: 2.3 Preparing the P4080DS Board 1.
Page 21 and 22: Working with Projects Power Archite
Page 29 and 30: 3.4.1 Debugging Bareboard Projects
Page 31 and 32: 7. Specify a name for the new proje
Page 33 and 34: Listing 3.2 Identifying the partiti
Page 45 and 46: 3.4.5 Debugging U-Boot To configure
Page 49: Index A Auto build mode 28 B BSC913

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