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® Power Management Products [Hotswap, Power Sequencing, System & Battery Management] X80200–Series Voltage Ramp Sequencers with Remote Status/Shutdown Product Highlights Complete voltage ramp sequencer for up to three DC voltage sources. Includes three integrated charge pumps, voltage monitors, undervoltage lookout, and power sequencing logic and control inputs to set up wide variety of solutions. Key Features • Sequence three voltage supplies independently —Core and Logic I/O VCC power sequencer for processor supplies • Voltage monitors have undervoltage lockout —Internal charge pump drives external N-channel FET switches —Cascadable to sequence more than 3 supplies —Time based or voltage based sequencing • Status register bits monitor gate output status • SMBus compatible Interface • Slave address identification for up to 8 power sequencers (24 supplies) on the same bus. Benefits • Independent charge pump control with sequencer logic of inputs • Wide variety of voltage sequencing applications • No oscillation required • Remote monitoring via 2-wire bus • See Application Note: AN165 and others Pin Configuration SETV REF A0 GND A1 A2 NC SDA SCL READY 20-lead TSSOP 1 2 3 4 5 6 7 8 9 10 Ordering Information 20 19 18 17 16 15 14 13 12 11 VDDL VDDM VDDH VFB DNC GATE_M GATE_H GATE_L ENS GATEH_EN UVLO H UVLO M UVLO L Package Part Number 4.5 3.0 0.9 TSSOP X80200V20I 4.5 2.25 0.9 TSSOP X80201V20I 3.0 2.25 1.7 TSSOP X80202V20I 3.0 2.25 0.9 TSSOP X80203V20I 3.0 0.9 0.9 TSSOP X80204V20I VDDM VDDL SETV REF A0 1 2 3 4 5 Description The X80200 power sequencer provides a flexible approach for handling difficult system power up conditions. The X80200 includes control of up to three voltage supplies and can be cascaded to control additional supplies. The device contains independent undervoltage lockout for each controlled voltage. The three voltage control circuits allow sequencing for primary, core, and I/O voltages. The core and I/O supplies are linked together with a comparator or a timer allowing a tight coupling between these two supplies. The sequencing may be either voltage based or time based. The X80200 contains separate charge pumps to control external N-channel power FETs for each of the supplies. The charge pumps provide the high gate control voltage necessary for efficient operation of the FET switches. The X80200 turns on the primary voltage to the system when the voltage has been on and stable for 1ms. This primary FET switch turn-on can be delayed with an external RC circuit. The device has a built-in “core-up-first and core-down-last” sequencer which is ideal for high performance processors, DSPs, and ASICs. The serial bus can be used to monitor the status or turn off each of the external power switches. The X80200 has 3 slave address bits that allow up to 8 devices to be connected to the same bus. Block Diagram VDDH VFB NC GATE_M GATE_H 20 19 18 17 16 UVLO H UVLO M UVLO L + – 2-wire Interface OSC Sequence Delay Logic Charge Pump_M Charge Pump_H Charge Pump_L Core-up-first Core-down-last Status Register Remote Shutdown Register 6 7 8 9 10 GND A1 A2 NC SDA 15 14 13 12 GATE_L ENS GATEH_EN READY 11 SCL New & Featured Products See Product Family Tree on page 2-14 www.xicor.com 1–23
® Signal Conditioning/Calibration and Control Products X9110 Single Digitally-Controlled (XDCP ) Potentiometer Product Highlights • Dual Supply: ± 5V Pot Operation • Low Power • 1024-tap • SPI bus • Non-volatile Digital Potentiometer Key Features • 1024 Resistor Taps – 10-Bit Resolution • SPI Serial Interface for write, read, and transfer operations of the potentiometer • Wiper Resistance, 40Ω Typical @ 5V • Endurance: 100,000 data changes per bit per register • 14-Lead TSSOP, 15-Lead CSP (Chip Scale Package) Call Factory for Availability • Dual Supply Version of the X9111 • Low Power CMOS Description The X9110 integrates a single digitally controlled potentiometer (XDCP) on a monolithic CMOS integrated circuit. The digital controlled potentiometer is implemented using 1023 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the SPI bus interface. The potentiometer has associated with it a volatile Wiper Counter Register (WCR) and four nonvolatile Data Registers that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power-up recalls the contents of the default data register (DR0) to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. Benefits • Digital Programmability • Set and Forget Calibration • Reliability • Dynamic Controls — Real time calibration — Adaptive response • Non-volatile storage and recall of wiper position • Power On Recall circuits • General purpose EEPROM Block Diagram Pin Configuration TSSOP V+ S0 A0 SCK WP SI V SS 1 2 3 4 5 6 7 14 13 12 X9110 11 10 9 8 V CC R L R H R W HOLD CS V- V CC R H V+ SPI Bus Interface Address Data Status Bus Interface & Control Write Read Transfer Control Power On Recall Wiper Counter Register (WCR) Data Registers (DR0-DR3) Wiper 100KΩ 1024-taps POT V SS NC NC R W RL V- * for ordering information refer to page 1-45 See Product Family Tree on page 2-1 1–24 www.xicor.com
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Page 5 and 6: CPU Supervisors, System Management,
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Page 63 and 64: Voltage Reference Products ® X6000
Page 71 and 72: ® Voltage Reference Products X6400
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