Table of Contents Section 1 – New and Featured Products

®
Signal Conditioning/Calibration and Control Products
X9470 Bias Control Product for RF Power Amplifiers (RFPA)
Product Highlights
• Power Amplifier Bias Control for cellular base station or RF power
amplifiers/module vendors
• DC Bias Control for LDMOS power amplifiers
Key Features
• Complete RFPA biasing solution for 900MHz, 1900MHz, and
2100MHz power amplifiers
• Integrated Current Sense, Comparator, Voltage Reference setting,
Voltage DACs, Output Buffer
• Closed Loop Mode sets gate bias of RF power amps during
manufacturing
• Closed Loop Mode in dynamically corrects for aging effects in
LDMOS amplifier design
• Gate voltage adjusted over temperature using a periodic sampling mode
• I 2 C interface and up to eight slave addresses to cover all ampifier
applications that require multiple LDMOS
• Monitors enable overcurrent and undercurrent protection of RFPA
• Internal buffer can drive 1nF for LDMOS gates or an external
inverting buffer can be used for GaAs
• Non-volatile registers to store bias voltage values No external
memory needed!!!
• Low bill of materials, small form-factor, available in 24-pin TSSOP
Pin Configuration
Ordering Information
TSSOP
V sense+ 1
24 V sense-
RH REF 2
23 SHDN
RL REF 3
22 INC/DEC
RW REF
AGND
4
5
21
20
V OUT
V+
VSS 6
19
X9470
V CC
CS 7
18 V CC
SCL 8
17 V BIAS
SDA 9
16 VSS
RH BIAS 10
15
A2
RW BIAS 11 14 A1
RL BIAS 12 13 A0
VCC Range VDD Range Package Operating Temp. Range Part Number
4.75-5.23V 20-28V TSSOP -40ºC to +85ºC X9470 V24I
Description
The Xicor X9470 RFPA Bias Controller contains all of the
necessary analog components to sense the PA drain current
through an external sense resistor and automatically control
the gate bias voltage of an LDMOS PA. The external sense
resistor voltage is amplified by an instrumentation amplifier
and the output of the amplifier along with an external reference
voltage is fed to the inputs of a comparator. The comparator
output indicates which direction the LDMOS gate bias voltage
will move in the next calibration cycle. System calibration is
accomplished by enabling the X9470 and providing a clock to
the SCL pin. The LDMOS drain current can be maintained constant
over temperature and aging changes by periodic calibration.
The V OUT pin can be used to monitor the average power
by tracking the drain current. Up to eight X9470 or additional
Xicor Digital Potentiometers can be controlled via a two-wire
serial bus.
Benefits
• Closed Loop Biasing to better than 6% accuracy
• High Integration reduces solution size and routing complexity
• Reduces time and cost to test in manufacturing
• Improves linearity performance by adjusting bias
to overcome aging effects
• Eliminates temperature drift
• Uses only two wires to control bias, minimizing intrusion
into RF circuitry
• Protection for RF Power Amplifier for high-current stress
or low current failure conditions
• Drives LDMOS gates directly at high speed for calibration
and shutdown
• No microcontroller required for memory transfers
at power-up
• Small board space
See Product Family Tree
on page 2-12
Block Diagram
A2
A1
A0
SDA
SCL
RW REF RL REF V+
V
V SS
INC/DEC
RH REF
AGND V OUT
V DD
V CC CS RH BIAS RW BIAS RL BIAS SHDN
Class A Example
REF
R REF
V SENSE+
C BULK
∆V
V SENSE–
R SENSE
Comparator
Instrumentation
VP
Amplifier
V REF
choke
I 2 C
control
interface
R BIAS
V bias
control
V BIAS
+
FILTER
Control &
–
RF
out
Status Registers
RF PA in
EEPROM
Matching
RF Impedance
V BIAS (Unbuffered)
1–50
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