PCS - Part 2: Multiprocessor Architectures
PCS - Part 2: Multiprocessor Architectures
PCS - Part 2: Multiprocessor Architectures
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Cache Coherency<br />
Coherency:<br />
Ensures that no old copies of data are used<br />
Weaker than consistency, i.e. inconsistencies are allowed<br />
but along with keeping track of inconsistencies<br />
Protocols:<br />
Invalidation: invalidate a copy when another processor is<br />
writing on address (snooping), always write-through is<br />
necessary<br />
MESI: keep track on usage of data, snooping, write-back<br />
only when necessary<br />
Directory–based Cache Coherency: for systems without<br />
shared address bus<br />
Peter Sobe<br />
<strong>PCS</strong> - <strong>Part</strong> 2: <strong>Multiprocessor</strong> <strong>Architectures</strong>
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