CAEN V767 128 Channel Gen. Purpose MH TDC - Physics

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02/07/2003 V767 User's Manual – Rev.4 TDC 3 VME P1 connector TDC 2 Rotary switches for Base address selection DRDY BUSY CLOCK RST SRCCLK TRG EXT INT START ON TDC 1 Paux connector for CERN VMEbus crate type V430 Clock source (EXT, INT) VME P2 connector TDC 0 Component side of the board DIP Switches which allow to insert the 110 Ω terminations: for each signal there are two DIP switches which must be inserted both in oder to insert the 110 Ω termination on the relevant line. Fig. 2.4: Mod. V767 Components Locations NPO: 00001/97:V767x.MUTx/04 Page 18 of 75
02/07/2003 V767 User's Manual – Rev.4 3. VME INTERFACE This module implements the CR/CSR space as required by the new VITA23 standard [6]. The CR (Configuration ROM) space contains read-only information on the hardware itself (e.g. manufacturer's ID, module characteristics, etc.). The CSR space contains the Control and Status Registers of the module (e.g. interrupt vector and level, CBLT/MCST base address, etc.). 3.1. ADDRESSING CAPABILITY The board's addressing can be done in different ways, described here below. 3.1.1. ADDRESSING VIA BASE ADDRESS The module works in A24/A32 mode. The Address Modifiers code recognized by the module are: AM=%3F: AM=%3D: AM=%3C: AM=%3B: AM=%39: AM=%38: AM=%0F: AM=%0D: AM=%0C: AM=%0B: AM=%09: AM=%08: A24 supervisory block transfer (BLT) A24 supervisory data access A24 supervisory 64-bit block transfer (MBLT) A24 user block transfer (BLT) A24 user data access A24 user 64-bit block transfer (MBLT) A32 supervisory block transfer (BLT) A32 supervisory data access A32 supervisory 64-bit block transfer (MBLT) A32 user block transfer (BLT) A32 user data access A32 user 64-bit block transfer (MBLT) The module's Base Address is fixed by 4 internal rotary switches housed on two piggyback boards plugged into the main printed circuit board (see Fig. 3.3). It is also possible to reassign via VME the Base address of the board (see Ref. [6]). The new address is lost at Power-Off and the rotary switch setting will be restored at Power-On or after a Reset (Bit Clear Register, see § 3.7). The Base Address can be selected in the range: % 00 0000 ⇔ % FF 0000 A24 mode % 0000 0000 ⇔ % FFFF 0000 A32 mode The Address Map of the page is shown in Table 3.1. The most relevant registers of the CR space are shown in Table 3.4. NPO: 00001/97:V767x.MUTx/04 Page 19 of 75
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CAEN V767 128 Channel Gen. Purpose MH TDC - Physics

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