Unit – 3 Session - 12 Data Processing Circuits - VTU e-Learning ...

More documents

Recommendations

Info

10CS 33 LOGIC DESIGN UNIT – 3 Data Processing Circuits Disadvantage of PROM There is a limit on the number of input variables. Typically, PROMs have 8 inputs or less. Drawing a PROM logic circuit It is cumbersome to draw large PROM circuit with all the diodes. An alternative, streamlined drawing procedure for PROMs is used. The simplified diagram of PROM is as shown: Universal Logic Solution PROM is an universal logic solution. The AND gates generate all the fundamental products and the user can then OR these products as needed to generate any Boolean output. Example: Realize a full adder using a PROM. Solution: The truth table of the full adder is as shown: B. S. Umashankar, BNMIT Page 2
10CS 33 LOGIC DESIGN UNIT – 3 Data Processing Circuits Inputs Outputs A B Ci S Co 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 The full adder using PROM is realized as shown below: Erasable PROMs The erasable PROM (EPROM) uses metal-oxide semiconductor field-effect effect transistors (MOSFETs). It has an array of floating-gate gate transistors individually programmed by an EPROM programmer. Storing data in the memory requires selecting a given address and applying a higher voltage to the transistors. Erasing EPROM contents B. S. Umashankar, BNMIT Page 3
Page 1: 10CS 33 LOGIC DESIGN UNIT - 3 Data
Page 5 and 6: 10CS 33 LOGIC DESIGN UNIT - 3 Data
Page 7 and 8: 10CS 33 LOGIC DESIGN UNIT - 3 Data
Page 9: 10CS 33 LOGIC DESIGN UNIT - 3 Data

Unit – 3 Session - 12 Data Processing Circuits - VTU e-Learning ...

Create successful ePaper yourself

Delete template?

Save as template?