STM8S and STM8A microcontroller families

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Memory and register map RM0016 3 Memory and register map For details on the memory map, I/O port hardware register map and CPU/SWIM/debug module/interrupt controller registers, refer to the product datasheets. 3.1 Memory layout 3.1.1 Memory map Figure 3. Memory map 00 000h RAM upper limit Data EEPROM lower limit RAM Stack Reserved Data EEPROM Data EEPROM upper limit 00 4800h Option bytes upper limit 00 5000h HW registers upper limit 00 6000h 00 6800h 00 7F00h 00 8000h 00 8080h Reserved Option bytes Reserved HW registers Reserved Boot ROM (optional) Reserved Registers for CPU, SWIM, ITC, DM Interrupt vectors Program EEPROM Program memory upper limit ai 18468 The RAM upper limit, data EEPROM upper and lower limit, Option Byte upper limit, hardware (HW) registers upper limit, and the program memory upper limit are specific to the device configuration. Please refer to the datasheets for quantitative information. 30/449 Doc ID 14587 Rev 8 www.BDTIC.com/ST
RM0016 Memory and register map 3.1.2 Stack handling Default stack model The stack of the STM8S and STM8A microcontrollers is implemented in the user RAM area. The default stack model is shown in Figure 4. Figure 4. Default stack model RAM Start address Stack roll-over limit (1) End address Stack pointer initialization value Default stack model ai15055 1. The stack roll-over limit is not implemented on all devices. Refer to the datasheets for detailed information. Stack pointer initialization value This is the default value of the stack pointer. The user must take care to initialize this pointer. Correct loading of this pointer is usually performed by the initialization code generated by the development tools (linker file). In the default stack model this pointer is initialized to the RAM end address. Stack roll-over limit In some devices, a stack roll-over limit is implemented at a fixed address. If the stack pointer is decreased below the stack roll-over limit, using a push operation or during context saving for subroutines or interrupt routines, it is reset to the RAM end address. The stack pointer does not roll over if stack pointer arithmetic is used. Such behavior of the stack pointer is of particular importance when developing software on a device with a different memory configuration than the target device. Doc ID 14587 Rev 8 31/449 www.BDTIC.com/ST
Page 1 and 2: RM0016 Reference manual STM8S and S
Page 3 and 4: RM0016 Contents 4.5.3 Enabling writ
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Page 23 and 24: RM0016 Central processing unit (CPU
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RM0016 Clock control (CLK) 9.1.3 LS
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RM0016 Clock control (CLK) The SWBS
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RM0016 Clock control (CLK) Figure 2
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RM0016 Clock control (CLK) 9.6 Cloc
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RM0016 Clock control (CLK) 9.9 CLK
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RM0016 Clock control (CLK) 9.9.3 Cl
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RM0016 Clock control (CLK) 9.9.6 Cl
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RM0016 Clock control (CLK) 9.9.8 Pe
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RM0016 Clock control (CLK) 9.9.10 C
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RM0016 Clock control (CLK) 9.9.12 S
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RM0016 Power management 10 Power ma
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RM0016 Power management 10.2.1 Wait
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RM0016 General purpose I/O ports (G
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RM0016 Auto-wakeup (AWU) 12.3 AWU f
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RM0016 Auto-wakeup (AWU) Example 1
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RM0016 Auto-wakeup (AWU) 12.4.3 Tim
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RM0016 Beeper (BEEP) 13.2.2 Beeper
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RM0016 Independent watchdog (IWDG)
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RM0016 Independent watchdog (IWDG)
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RM0016 Window watchdog (WWDG) Figur
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RM0016 Window watchdog (WWDG) Figur
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RM0016 Window watchdog (WWDG) Bits
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RM0016 Timer overview 16.1 Timer fe
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RM0016 Timer overview Table 36. Exp
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RM0016 16-bit advanced control time
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RM0016 Serial peripheral interface
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RM0016 Revision history 25 Revision
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RM0016 Revision history Table 78. D
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RM0016 Index IWDG_KR . . . . . . .
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RM0016 Please Read Carefully: Infor
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