STM8S and STM8A microcontroller families

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Flash program memory and data EEPROM RM0016 Figure 6. Flash memory and data EEPROM organization on low density STM8S 1 page = 1 block = 64 bytes DATA EEPROM 0x00 4000 0x00 427F 0x00 4800 0x00 483F DATA MEMORY (up to 640 bytes) OPTION BYTES (1 block) 0x00 8000 Interrupt vectors (128 bytes) Programmable size from 2 pages (1 Kbytes) up to 8 Kbytes (1 page steps) USER BOOT CODE (UBC) (permanently write protected) Flash program memory 8 Kbytes of FLASH PROGRAM MEMORY MAIN PROGRAM (write access possible for IAP and using MASS mechanism) 0x00 9FFF ai15503 38/449 Doc ID 14587 Rev 8 www.BDTIC.com/ST
RM0016 Flash program memory and data EEPROM Figure 7. Flash memory and data EEPROM organization on medium density STM8S and STM8A 1 page = 512 bytes 1 block = 128 bytes DATA EEPROM 00 4000h 00 43FFh 00 4800h 00 487Fh DATA MEMORY (up to 1 Kbyte) OPTION BYTES (1 block) 00 8000h Interrupt vectors (128 bytes) Programmable size from 2 pages (1 Kbyte) up to 32 Kbytes (1 page steps) USER BOOT CODE (UBC) (permanently write protected) Flash program memory MAIN PROGRAM (write access possible for IAP and using MASS mechanism) 00 FFFFh ai15502 1. The memory mapping is given for the STM8A devices featuring 32 Kbytes of Flash program memory and 1 Kbytes of SRAM. Doc ID 14587 Rev 8 39/449 www.BDTIC.com/ST
Page 1 and 2: RM0016 Reference manual STM8S and S
Page 3 and 4: RM0016 Contents 4.5.3 Enabling writ
Page 5 and 6: RM0016 Contents 9.7 Clock-out capab
Page 7 and 8: RM0016 Contents 13.3.1 Beeper contr
Page 9 and 10: RM0016 Contents 17.7.12 Capture/com
Page 11 and 12: RM0016 Contents 19.6.9 Auto-reload
Page 13 and 14: RM0016 Contents 22.4 LIN mode funct
Page 15 and 16: RM0016 Contents 24.2 ADC main featu
Page 17 and 18: RM0016 List of tables List of table
Page 19 and 20: RM0016 List of figures List of figu
Page 21 and 22: RM0016 List of figures (BDM = 0 and
Page 23 and 24: RM0016 Central processing unit (CPU
Page 29 and 30: RM0016 Boot ROM 2 Boot ROM The inte
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Page 77 and 78: RM0016 Clock control (CLK) 9 Clock
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RM0016 Clock control (CLK) 9.9 CLK
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RM0016 Clock control (CLK) 9.9.3 Cl
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RM0016 Clock control (CLK) 9.9.6 Cl
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RM0016 Clock control (CLK) 9.9.8 Pe
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RM0016 Clock control (CLK) 9.9.10 C
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RM0016 Clock control (CLK) 9.9.12 S
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RM0016 Power management 10 Power ma
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RM0016 Power management 10.2.1 Wait
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RM0016 General purpose I/O ports (G
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RM0016 Auto-wakeup (AWU) 12.3 AWU f
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RM0016 Auto-wakeup (AWU) Example 1
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RM0016 Auto-wakeup (AWU) 12.4.3 Tim
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RM0016 Beeper (BEEP) 13.2.2 Beeper
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RM0016 Independent watchdog (IWDG)
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RM0016 Independent watchdog (IWDG)
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RM0016 Window watchdog (WWDG) Figur
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RM0016 Window watchdog (WWDG) Figur
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RM0016 Window watchdog (WWDG) Bits
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RM0016 Timer overview 16.1 Timer fe
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RM0016 Timer overview Table 36. Exp
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RM0016 16-bit advanced control time
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RM0016 16-bit general purpose timer
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RM0016 8-bit basic timer (TIM4, TIM
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RM0016 Serial peripheral interface
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RM0016 Universal asynchronous recei
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RM0016 Analog/digital converter (AD
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RM0016 Revision history 25 Revision
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RM0016 Revision history Table 78. D
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RM0016 Index IWDG_KR . . . . . . .
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RM0016 Please Read Carefully: Infor
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STM8S and STM8A microcontroller families

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