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FactSheet HELiA - Roth & Rau AG

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Texturing<br />

PECVD 1<br />

Back Side i/n<br />

PECVD 2<br />

Front Side i/p<br />

PVD<br />

TCO Front/ Back Side<br />

Back Contact<br />

Screen<br />

Printing<br />

Curing<br />

Cell Tester<br />

& Sorter<br />

Heterojunction Technology process<br />

The Silicon heterojunction technology is an appealing<br />

concept that combines thin amorphous silicon layers with<br />

monocrystalline silicon wafers to realize cell efficiencies<br />

above 20%. The simple structure of the HJT cells needs<br />

less processing steps compared to conventional cell<br />

designs. The excellent surface passivation of the a-Si:H<br />

layer results in high cell efficiency potential.<br />

The superior temperature coefficient of T C<br />

= -0.27%/K<br />

results in a higher energy yield at operating conditions.<br />

Low temperature processing (

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