Presentation on System-Level Design and Verification using ADS ...
Presentation on System-Level Design and Verification using ADS ...
Presentation on System-Level Design and Verification using ADS ...
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<strong>System</strong> Verificati<strong>on</strong>:<br />
Start <strong>System</strong>-<strong>Level</strong> Testing with Comp<strong>on</strong>ent Hardware<br />
<strong>System</strong><br />
Definiti<strong>on</strong><br />
• Comp<strong>on</strong>ent Hardware Available, but Remaining<br />
Hardware is Still Missing<br />
EM<br />
Tape Out<br />
Circuit/RFIC<br />
<strong>Design</strong><br />
<strong>System</strong><br />
Integrati<strong>on</strong><br />
Baseb<strong>and</strong><br />
• Use Hardware DUT-in-the-Simulati<strong>on</strong> Path to<br />
Test Comp<strong>on</strong>ent at a <strong>System</strong>-<strong>Level</strong><br />
• If Integrati<strong>on</strong> Problem is Identified, then Create<br />
a Simulati<strong>on</strong> Model from Hardware DUT to Modify<br />
<strong>System</strong> <strong>Design</strong> in Simulati<strong>on</strong><br />
<strong>System</strong><br />
Verificati<strong>on</strong><br />
Asia EEsof Spring Technology Forum Page 34
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