Presentation on System-Level Design and Verification using ADS ...

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Ag ile nt T e c hno log ie s Ag ile n t T e c h nolog ie s Ag ile nt T e c hno log ie s Agilent Technologies Other RF Data-Based Behavioral Models Lo a d P ull Setup • Simulation Control Components that Create Structured Data Sets To Describe Circuit Behavior • Data Set is used by a Unique Component to implement Model Behavior LoadPullSetup X5 Freq=1 GHz Order=10 Pin_Start=-50 _dBm Pin_Stop=-20 _dBm Pin_Step=10 _dB GamAng_Start=-180 _degrees GamAng_Stop=180 _degrees GamAng_Step=20 _degrees GamMag_Start=0.1 GamMag_Stop=0.9 GamMag_Step=0.1 in in H1H2 Setup Am p H1H2_S e tu p X6 F re q =1.0 G Hz Order=10 Pin_Start=-50.0 _dBm Pin_Stop=-20.0 _dBm Pin_Step=10.0 _dB out P2D Setup out Am p lifie rP 2 D _ S e tu p X1 Filename="p2dfile.p2d" Order=10 F re q _S ta rt=1.0 G Hz Freq_Stop=2.0 GHz Freq_Step=0.1 GHz Pin_Start=-50.0 _dBm Pin_Stop=-20.0 _dBm Pin_Step=10.0 _dB AmpLoadPull AMP 2 Da ta s e t="d a ta s e t.d s " In s tru m e n tID = "X1 " Am p H1H2 AMP 3 Da ta s e t="d a ta s e t.d s " G1expr="Vout[1]/Vin[1]" G2expr="Vout[2]/Vin[1]" Am p lifie rP 2 D AMP 1 F re q =1.0 G Hz P2DFile="p2dfile.p2d" I Q RF IQ M o d ula to r Setup IQ_Mod_Setup X2 F re q =1.0 G Hz Order=10 Pin_Start=-40 _dBm Pin_Stop=10 _dBm Pin_Step=2 _dB IQ_Mod_Data X4 Da ta s e t="d a ta s e t.d s " F re q =1.0 G Hz In s tru m e n tID = "X1 " Asia EEsof Spring Technology Forum Page 53
IQ Modulator Measurement-Based Modeling Test Setup Ref: Joel Dunsmore, Greg Jue, and John Kikuchi, Agilent Technologies, A Measurement-base Behavioral Model for I/Q RF Modulators, Microwave Journal, December 2002. Measurement-Based Model Shows Good Agreement between Simulated and Measured EVM Comparisons 8 EVM (%) 6 4 2 Simulated Measured IQ Simulation Model File 0 0.14 0.18 0.22 0.26 0.30 0.34 IQ Input Voltage (V) 0.38 This is a custom application of Connected Solutions, and shows it’s flexibility in applications such as creating measurement-based simulation models Asia EEsof Spring Technology Forum Page 54
Page 1 and 2:
Agilent EEsof EDA This document is
Page 3 and 4: Design & Verification Flow System D
Page 5 and 6: ADS Top-Down Design Flow Bottom-Up
Page 7 and 8: ADS System-Level Modeling Amplifier
Page 9 and 10: Applying System-Level Modeling in a
Page 11 and 12: Case Study: Transmitter Design Exam
Page 13 and 14: Design Specifications for Example T
Page 15 and 16: Perform Simulation and Verify ACLR
Page 17 and 18: Circuit/RFIC Design: RF Circuit and
Page 19 and 20: Verify ACLR Design Performance Meet
Page 21 and 22: Automatic Verification Modeling (AV
Page 23 and 24: Setup Circuit Envelope Controller f
Page 25 and 26: System Integration: RF Behavioral M
Page 27 and 28: Example of AmplifierP2D Model Small
Page 29 and 30: Replace Circuit Design with Behavio
Page 31 and 32: Replace Fixed-Point FIR Filter with
Page 33 and 34: ACLR Performance of Final Design wi
Page 35 and 36: System Verification: Start System-L
Page 37 and 38: Insert HW DUT in the Simulation Pat
Page 39 and 40: Picture of Test Signal Downloaded f
Page 41 and 42: Access Impact on System Performance
Page 43 and 44: Create Simulation Model of Amplifie
Page 45 and 46: Compare Simulated vs. Measured ACLR
Page 47 and 48: Include the Effects of Residual EVM
Page 49 and 50: Use the Meas-Based Model to Re-Iter
Page 51 and 52: Final System Design EVM Performance
Page 53: Appendix
Page 57 and 58: Demo: ADS Simulation with 89600 VSA
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