ieee transactions on very large scale integration (vlsi) - Computer ...
ieee transactions on very large scale integration (vlsi) - Computer ...
ieee transactions on very large scale integration (vlsi) - Computer ...
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
776 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 14, NO. 7, JULY 2006<br />
Paul Thadikaran (M’00) received the Ph.D. degree<br />
in computer science from the State University of New<br />
York (SUNY), Buffalo.<br />
He is currently a Principal Engineer with the Enterprise<br />
Microprocessor Development Group, Intel Corporati<strong>on</strong>,<br />
Hillsboro, OR. He is also an Adjunct Professor<br />
with the Oreg<strong>on</strong> Health Sciences and Engineering<br />
University and SUNY St<strong>on</strong>ybrook. He has<br />
been involved with various aspects of design and test<br />
of previous three generati<strong>on</strong>s of Intel’s IA-32 CPU.<br />
He has managed CAD tool development and standard<br />
cell library development targeted for CPU designs for the past six years. His<br />
areas of interest include CAD tools and algorithms for test generati<strong>on</strong>, power estimati<strong>on</strong>,<br />
functi<strong>on</strong>al verificati<strong>on</strong>, and diagnosis. He has published several papers<br />
in IEEE/Intel c<strong>on</strong>ferences and journals. He has also coauthored the book, Introducti<strong>on</strong><br />
to I Testing (Springer, 1997). He has served as a reviewer for several<br />
IEEE and ACM journals, such as the IEEE TRANSACTIONS ON COMPUTER-<br />
AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS and ACM Transacti<strong>on</strong>s<br />
<strong>on</strong> Design Automati<strong>on</strong> in Electr<strong>on</strong>ic Systems.<br />
Srikanth Venkataraman (S’93–M’97) received the<br />
Ph.D. degree in electrical engineering from the University<br />
of Illinois at Urbana-Champaign, Urbana.<br />
He is a Manager and Principal Engineer with<br />
Intel Corporati<strong>on</strong>, Hillsboro, OR. He is involved<br />
in the areas of DFT, test tools and methodologies,<br />
diagnosis, and debug technologies in the Design and<br />
Technology Soluti<strong>on</strong>s Group. His research interests<br />
include VLSI test, CAD and software engineering.<br />
He has authored or coauthored over 50 publicati<strong>on</strong>s,<br />
holds <strong>on</strong>e patent, and has three patents pending, and<br />
he has presented tutorials at several c<strong>on</strong>ferences.<br />
Dr. Venkataraman was the recipient of the Best Paper Award at IEEE Vehicular<br />
Technology Symposium (VTS) 2000, a Top 10 Papers at ITC 2000, and Best<br />
Panel at IEEE VTS 1999. Intel awards include the Intel Achievement Award<br />
(2005), the Divisi<strong>on</strong>al Recogniti<strong>on</strong> Awards (2000, 2002, and 2004), the Technical<br />
Recogniti<strong>on</strong> Award (2002), the Excellence Award (2001), and Best Paper<br />
Awards at the Design and Test C<strong>on</strong>ference (2002 and 2003).