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Data Structures and Algorithms in Java[1].pdf - Fulvio Frisone

Data Structures and Algorithms in Java[1].pdf - Fulvio Frisone

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Caches <strong>and</strong> Disks<br />

Specifically, the two levels that matter most depend on the size of the problem we<br />

are try<strong>in</strong>g to solve. For a problem that can fit entirely <strong>in</strong> ma<strong>in</strong> memory, the two<br />

most important levels are the cache memory <strong>and</strong> the <strong>in</strong>ternal memory. Access<br />

times for <strong>in</strong>ternal memory can be as much as 10 to 100 times longer than those for<br />

cache memory. It is desirable, therefore, to be able to perform most memory<br />

accesses <strong>in</strong> cache memory. For a problem that does not fit entirely <strong>in</strong> ma<strong>in</strong><br />

memory, on the other h<strong>and</strong>, the two most important levels are the <strong>in</strong>ternal<br />

memory <strong>and</strong> the external memory. Here the differences are even more dramatic,<br />

for access times for disks, the usual general-purpose external-memory device, are<br />

typically as much as 100000 to 1000000 times longer than those for <strong>in</strong>ternal<br />

memory.<br />

To put this latter figure <strong>in</strong>to perspective, imag<strong>in</strong>e there is a student <strong>in</strong> Baltimore<br />

who wants to send a request-for-money message to his parents <strong>in</strong> Chicago. If the<br />

student sends his parents an e-mail message, it can arrive at their home computer<br />

<strong>in</strong> about five seconds. Th<strong>in</strong>k of this mode of communication as correspond<strong>in</strong>g to<br />

an <strong>in</strong>ternal-memory access by a CPU. A mode of communication correspond<strong>in</strong>g<br />

to an external-memory access that is 500000 times slower would be for the<br />

student to walk to Chicago <strong>and</strong> deliver his message <strong>in</strong> person, which would take<br />

about a month if he can average 20 miles per day. Thus, we should make as few<br />

accesses to external memory as possible.<br />

14.2.2 Cach<strong>in</strong>g Strategies<br />

Most algorithms are not designed with the memory hierarchy <strong>in</strong> m<strong>in</strong>d, <strong>in</strong> spite of the<br />

great variance between access times for the different levels. Indeed, all of the<br />

algorithm analyses described <strong>in</strong> this book so far have assumed that all memory<br />

accesses are equal. This assumption might seem, at first, to be a great oversight—<strong>and</strong><br />

895

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