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Develop a time stamping application in PlantStruxure? - Schneider ...

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1-Introduction<br />

methodology is provided to create a <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> <strong>application</strong>. Here is an overview of<br />

this method:<br />

• Selection: In this phase, you will decide the selection criteria and steps that will<br />

guide you to select the most appropriate solution for your <strong>application</strong><br />

requirements.<br />

• Design: This phase comprises four ma<strong>in</strong> parts:<br />

• System hardware design: how to develop the <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> system<br />

hardware.<br />

• System software design: how to develop <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> with <strong>Schneider</strong><br />

Electric software.<br />

• Derived Function Block (DFB) design: provide a package of the DFBs for<br />

the <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> <strong>application</strong>.<br />

• SCADA design: how to develop Vijeo Citect <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> genies.<br />

• Configuration: This phase expla<strong>in</strong>s how to set up the <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> <strong>application</strong>:<br />

• How to set up <strong>time</strong> clock synchronization with references<br />

• How to set up a <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> solution by module<br />

• How to set up a <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> solution by program<br />

• Implementation: This phase expla<strong>in</strong>s the programm<strong>in</strong>g requirements:<br />

• The PAC part expla<strong>in</strong>s how to set up the <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> sections.<br />

• The SCADA part expla<strong>in</strong>s how to set up the Vijeo Citect <strong>time</strong> <strong>stamp<strong>in</strong>g</strong><br />

genies and alarms.<br />

• Operation: This phase presents the capabilities of the f<strong>in</strong>al SCADA <strong>application</strong>:<br />

• How to use Vijeo Citect <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> genies<br />

• How to use the <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> alarms<br />

1.6. Limitation<br />

The accuracy of <strong>time</strong>stamps relies on the accuracy of the clock reference. It is also<br />

impacted by the transmission mode. For example, when the CPU RTC gets the <strong>time</strong><br />

from the NTP server, the <strong>time</strong> is delayed by the transmission through the network. A<br />

method must be developed to calculate the delay and adjust the clock reference as<br />

needed. This is not <strong>in</strong> the scope of this STG. For the Purposes of this guide, we<br />

assume that the <strong>time</strong> used for <strong>time</strong> <strong>stamp<strong>in</strong>g</strong> does not suffer any delay.<br />

13

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