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Signetics Programmable Logic Devices - Al Kossow's Bitsavers

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Signefics<br />

Document No. 853-0960<br />

ECN No. 97887<br />

Date of Issue October 16, 1989<br />

Status Product Specification<br />

-<br />

,programmable LogiC -ueVlces<br />

PLHS 16L8AJB<br />

<strong>Programmable</strong> AND Array <strong>Logic</strong><br />

(16 x 64 x 8)<br />

DESCRIPTION<br />

The PLHS16L8A is a high-speed "A" version,<br />

and the PLHS16L8B is a very highspeed<br />

"B"version PAL@-typedevice. The<br />

sum of products (AND-OR) architecture is<br />

comprised of 64 AND gates and 8 OR<br />

gates. The <strong>Signetics</strong> PLHS16L8AIB devices<br />

offer 100% functional compatibility<br />

with other PAL 16L8 devices. Specified at<br />

a tpD of 20ns (maximum), the PLHS 16L8A<br />

is 20% faster than other "A" version PAL<br />

16L8 devices, and consumes 20% less<br />

power than most other "A" speed 16L8devices.<br />

The PLHS16L8B, specffied at<br />

155mA Icc (maximum), consumes 20%<br />

less power than other "B" version PAL<br />

16L8 devices.<br />

<strong>Al</strong>l AND gates are linked to 10 dedicated<br />

inputs, 6 bidirectionalI/O and 2 dedicated<br />

outputs. On-chip buffers couple eithertrue<br />

(I, B) or complement (1. "8) input polarities<br />

to all AND gates. The 64 AND gates are<br />

separated into eight groups of eight product<br />

terms each. Within each group, seven<br />

of the AND terms are OR'ed together,<br />

while the eighth is used to control the<br />

3-State function olthe bidirectionalI/O. <strong>Al</strong>l<br />

outputs (bidirectional and dedicated) are<br />

inverting.<br />

In the virgin state, the AND array fuses are<br />

back-to-back CB-EB diode pairs which act<br />

as open connections. Current is avalanched<br />

across individual diode pairs during<br />

fusing, which essentially short circuits<br />

the EB diode and provides the connection<br />

for the associated product term.<br />

The PLHS 16L8AIB is field-programmable,<br />

allowing the user to quickly generate<br />

custom patterns using standard<br />

programming equipment.<br />

Order codes are listed in the Ordering<br />

Information Table.<br />

FEATURES<br />

• "A" version 100% functionally and<br />

pin-for-pin compatible with<br />

AmPAL16L8A, MMI PAL16L8A,<br />

TlBPAL16L8-25, and<br />

NSC PAL 16LBA devices<br />

- 20% faster than other "A" version<br />

PAL devices<br />

- t pD = 20ns (max)<br />

• "B" version 100% functionally and<br />

pin-for-pin compatible with<br />

AmPAL16L8B, MMI PAL16L8B,<br />

TlBPAL 16L8-15 and NSC PAL1618B<br />

devices<br />

- Consumes 20% less power than<br />

other "B" version PAL devices<br />

- 155mA Icc (worst case)<br />

- 110 propagation delay: 15ns (max)<br />

("B" verSion)<br />

• Field-programmable<br />

• 10 dedicated inputs<br />

• 8 outputs<br />

- 6 bidirectional 110<br />

- 2 dedicated outputs<br />

• Individual 3-State control of all<br />

outputs<br />

• 64 AND gates/product terms<br />

• Security fuse<br />

PIN CONFIGURATIONS<br />

APPLICATIONS<br />

N Package<br />

A Package<br />

10 vee 07<br />

Ia GND 19 00 B,<br />

.100% functional replacement for<br />

20-pin 16L8 combinatorial PAL devicas<br />

• Random logic<br />

• Code converters<br />

• Fault detectors<br />

• Function generators<br />

• Address mapping/decoding<br />

• Multiplexing<br />

® PAL is a registered trademark of Monolithic Memories. Inc., a wholly owned subsidiary of Advanced Micro DevIces, Inc.<br />

39<br />

PHILIPS

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