VLSI I: von Architektur zu hochintegrierter Schaltung und FPGA
VLSI I: von Architektur zu hochintegrierter Schaltung und FPGA
VLSI I: von Architektur zu hochintegrierter Schaltung und FPGA
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A. Area and delay figures of selected functions in <strong>VLSI</strong>Select functionsFunction A t pd C inµm 2 ns fF2-to-1 MUX 1x drive 11.5 0.10 1.54-to-1 MUX 1x drive 32.0 0.14 2Table 1: Parameters of select-logic functions (UMC L130).Arithmetic functionsThe figures of table 2 do include the approximate area occupied by inter-cell wiring as estimated by Synopsys DesignCompiler. Synthesis results have been obtained by instantiating the appropriate Designware component followed byoptimization with no timing constraints.Structure Word A t pdwidth µm 2 nsAdd (ripple-carry) 16 450 2.54Add (carry-lookahead) 16 3600 0.38Add/Sub (carry-lookahead) 16 3126 0.59Multiply (unpipelined, carry-save) 16x16 20’493 2.36Table 2: Two’s complement addition/subtraction and multiplication functions (UMC L130).Bistable storage functionsFunction A t pd t su C inµm 2 ns ns fFD Flip-Flop with no reset 1x drive 25.6 0.16 0.07 1.4D Flip-Flop with reset 1x drive 28.2 0.17 0.06 1.4Table 3: Selected storage functions: Flip-flops (UMC L130).4
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