Advanced 64-bit Microprocessors Product Family 79RC64574 ...

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79RC64574 79RC64575System Interface ParametersParameterSymbolTestConditionsRC64574/RC64575200MHzRC64574/RC64575250MHzUnitsMin Max Min MaxData Output t DO = Max mode 14 ..13 = 10(Faste st)mode 14 ..13 = 11(85%)mode 14 ..13 = 00(66%)— 5 — 4.3 ns— 6 — 4.5 ns— 7 — 5 nsData Output Hold t DOH1Data Input1. 50 pf loading on external output signalsBoot-time Interface Parametersmode 14 ..13 = 01(Slowest)— 8 — 5 nsmode 14 ..13 = 10 0 — 0 — nsmode 14 ..13 = 11 0 — 0 — nsmode 14 ..13 = 00 0 — 0 — nsmode 14 ..13 = 01 0 — 0 — nst DSt rise = 3ns2 — 2 — nst DHt fa ll = 3ns1.0 — 1.0 — nsParameterSymbolTestConditionsRC64574/RC64575200MHzRC64574/RC64575250MHzConditionsMin Max Min MaxMode Data Setup t DS — 4 — 4 — SysClock CycleMode Data Hold t DH — 0 — 0 — SysClock Cycle20 of 28 December 14, 2001
79RC64574 79RC64575Mode Configuration Interface Reset SequenceVcc2.3V2.3VMasterClock(MClk)VCCOK> 100msTDS256 MClk cycles256MClkcyclesModeClockModeInTDSTMDSBit 0TMDHBitBit 1255TDSColdReset*TDS> 64K MClk cycles> 64 MClk cyclesTDSReset*Figure 8 Power-on ResetVccMasterClock(MClk)VCCOKTDS> 100msTDS256 MClk cycles256MClkcyclesModeClockModeInTMDSTMDHBit Bit Bit0 1 255TDSTDSColdReset*TDS> 64K MClk cycles> 64 MClk cyclesTDSReset*Figure 9 Cold ResetVccMasterClock(MClk)VCCOK256 MClk cyclesModeClockModeInColdReset*TDSTDSReset*> 64 MClk cyclesFigure 10 Warm Reset21 of 28 December 14, 2001
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Advanced 64-bit Microprocessors Product Family 79RC64574 ...

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