MC80F7708 - abov.co.kr

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MC80F77082. BLOCK DIAGRAMCommon Drive OutputCOM0 ~ COM7(COM0 ~ COM3)Segment Drive OutputSEG0 ~ SEG15(SEG0 ~ SEG19)BIAS Selection circuitInternal Resistorfor LCD BiasLCD Controller/Driver (LCDC)V DDV SSPowerSupplyPowerSupplyCircuitPSWALU Accumulator Stack PointerDataMemoryPCInterrupt ControllerLCDDisplayMemoryProgramMemoryRESETSystem controllerSystemClock Controller8-bit BasicInterval TimerData TableTiming generatorX INX OUTSX INSX OUTHigh freq.ClockLow freq.GeneratorWatch/Watch DogTimerUART08-bit A/DConverterPWM8/16-bitTimer/CounterPCPOR&BIRR7 R6 R4R5 R2R1R08 8 78 4/6 14BuzzerDriverR70R71R72R73R74R75R76R77R60R61R62R63R64R65R66R67R41/INT2R42R43R44/INT3R45R46R47R50/RX0R51/TX0R52/ACKR53R54R55R56R57R20 / AN0R21 / AN1R22 / AN2R23 / AN3R24 / AN4R25 / AN5R10 / PWM1 / T2OR01 / EC0R04 / BUZOR06 / INT0R07 / INT1*R24/AN3 and R25/AN5 are not supported in MC80F7708K(42pin).MC80F7708Q : R20/AN0 ~ R25/AN5MC80F7708K : R20/AN0 ~ R23/AN36 December 3, 2012 Ver 1.21
MC80F77083. PIN ASSIGNMENT44MQFP(Top View)R73 / SEG19 / COM4R72 / SEG18 / COM5R71 / SEG17 / COM6R70 / SEG16 / COM7R67 / SEG15R66 / SEG14R65 / SEG13R64 / SEG12R63 / SEG11R62 / SEG10R61 / SEG9R74 / COM3R75 / COM2R76 / COM1R77 / COM0R25 / AN5R24 / AN4R23 / AN3R22 / AN2R21 / AN1R20 / AN0R01 / EC034353637383940414243443332313029282726252423MC80F7708Q2221201918171615141312R60 / SEG8R57 / SEG7R56 / SEG6R55 / SEG5R54 / SEG4R53 / SEG3R52 / SEG2 / ACKR51 / SEG1 / TX0R50 / SEG0 / RX0R10 / PWM1 / T2OR07 / INT1R06 / INT0R04 / BUZOVDDVSSR41 / INT2XOUT / R42XIN / R43R44 / INT3SXIN / R45SXOUT / R46RESET / R47123456789101142SDIP(Top View)R23 / AN3R22 / AN2R21 / AN1R20 / AN0R01 / EC0R06 / INT0R04 / BUZOV DDV SSR41 / INT2X OUT / R42X IN / R43R44 / INT3SX IN / R45SX OUT / R46RESET / R47R07/INT1R10 / PWM1 / T2OR50 / SEG0 / RX0R51 / SEG1 / TX0R52 / SEG2 / ACK123456789101112131415161718192021MC80F7708K424140393837363534333231302928272625242322R77 / COM0R76 / COM1R75 / COM2R74 / COM3R73 / SEG19 / COM4R72 / SEG18 / COM5R71 / SEG17 / COM6R70 / SEG16 / COM7R67 / SEG15R66 / SEG14R65 / SEG13R64 / SEG12R63 / SEG11R62 / SEG10R61 / SEG9R60 / SEG8R57 / SEG7R56 / SEG6R55 / SEG5R54 / SEG4R53 / SEG3*R24/AN3 and R25/AN5 are not not supported in MC80F7708K(42pin).December 3, 2012 Ver 1.21 7
Page 1 and 2: ABOV SEMICONDUCTOR Co. Ltd.8-BIT SI
Page 3 and 4: MC80F7708Table of Contents1. OVERVI
Page 5 and 6: MC80F77081. OVERVIEW1.1 Description
Page 7 and 8: MC80F77081.3 Development ToolsThe M
Page 9: MC80F77081.4 Ordering InformationDe
Page 13 and 14: MC80F77085. PIN FUNCTIONV DD : Supp
Page 15 and 16: MC80F7708PIN NAMEPin No.Primary Fun
Page 17 and 18: MC80F7708R43 (X IN ), R42 (X OUT )X
Page 19 and 20: MC80F77087. ELECTRICAL CHARACTERIST
Page 21 and 22: MC80F77087.4 LCD Characteristics(T
Page 23 and 24: MC80F77081/f MCPt MCPW t MCPWX IN0.
Page 25 and 26: MC80F77088. MEMORY ORGANIZATION8.1
Page 27 and 28: MC80F7708At execution of aCALL/TCAL
Page 29 and 30: MC80F7708AddressProgram Memory0FFC0
Page 31 and 32: MC80F77088.3 Data MemoryFigure 8-8
Page 33 and 34: MC80F7708Address Register Name Symb
Page 35 and 36: MC80F77088.4 Addressing Mode2The MC
Page 37 and 38: MC80F7708Y indexed direct page (8 b
Page 39 and 40: MC80F77089. I/O PORTSThe MC80F7708
Page 41 and 42: MC80F7708R1 Data RegisterR1R1 Direc
Page 43 and 44: MC80F7708R6 PortsR6 is an 8-bit CMO
Page 45 and 46: MC80F7708The SCMR should be set to
Page 47 and 48: MC80F7708CKCTLR7 6 5 4 3 2 1 0- - S
Page 49 and 50: MC80F7708TM0, TM2 (Timer0, 2 Mode C
Page 51 and 52: MC80F7708T2 (Timer2 Register)R R R
Page 53 and 54: MC80F7708TM2Bit : 7 6 5 4 3 2 1 0-
Page 55 and 56: MC80F7708should be set to “1” r
Page 57 and 58: MC80F7708TM0Bit : 7 6 5 4 3 2 1 0-
Page 59 and 60: MC80F7708T0,1,2,3nn-1This value is
Page 61 and 62:
MC80F7708TM2Bit : 7 6 5 4 3 2 1 0-
Page 63 and 64:
MC80F7708~~f MAINT1~ ~00 01 02 03 0
Page 65 and 66:
MC80F7708WTCK[2:0]f SUBf MAIN ÷2 8
Page 67 and 68:
MC80F7708Sour ClockBIT OverflowBina
Page 69 and 70:
MC80F7708ADCM (A/D Converter Mode R
Page 71 and 72:
MC80F770816. BUZZER OUTPUT FUNCTION
Page 73 and 74:
MC80F770817. INTERRUPTSThe MC80F770
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MC80F7708IENH (Interrupt Enable Hig
Page 77 and 78:
MC80F7708The following method is us
Page 79 and 80:
MC80F770817.4 External InterruptThe
Page 81 and 82:
MC80F770818.1 Control of LCD Driver
Page 83 and 84:
MC80F770818.2 LCD BIAS ControlThe M
Page 85 and 86:
MC80F770818.4 Control Method of LCD
Page 87 and 88:
MC80F770818.5 Duty and Bias Selecti
Page 89 and 90:
MC80F7708RECEIVERXEACKTX_CLK1 / 2(D
Page 91 and 92:
MC80F7708BRGCR0R/W R/W R/W R/W R/W
Page 93 and 94:
MC80F770820. OPERATION MODEThe syst
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MC80F7708.Oscillator(X IN )Internal
Page 97 and 98:
MC80F7708Oscillator(X IN pin)~~~Int
Page 99 and 100:
MC80F770822. OSCILLATOR CIRCUITThe
Page 101 and 102:
MC80F77081 2 3 4 5 6 7System ClockR
Page 103 and 104:
MC80F7708The BIR of MC80F7708 has 8
Page 105 and 106:
MC80F7708The oscillation fail proce
Page 107 and 108:
MC80F7708all of ABOV FLASH/OTP devi
Page 109 and 110:
MC80F770828. IN-SYSTEM PROGRAMMING2
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MC80F770828.3 Hardware Conditions t
Page 113 and 114:
MC80F770828.6 Reference ISP Circuit
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MC80F7708APPENDIXDecember 3, 2012 V
Page 117 and 118:
MC80F7708December 3, 2012 Ver 1.21i
Page 119 and 120:
MC80F7708OP BYTE CYCLENO. MNEMONICC
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MC80F770816-BIT OperationNO.MNEMONI
Page 123:
MC80F7708Control Operation & Etc.NO
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