MC80F7708 - abov.co.kr

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MC80F77087.7 Typical CharacteristicsThese graphs and tables are for design guidance only andare not tested or guaranteed.In some graphs or tables, the data presented are outsidespecified operating range (e.g. outside specifiedV DD range). This is for information only and devicesare guaranteed to operate properly only within thespecified range.The data is a statistical summary of data collected on unitsfrom different lots over a period of time. “Typical” representsthe mean of the distribution while “max” or “min”represents (mean + 3σ) and (mean − 3σ) respectivelywhere σ is standard deviation20 December 3, 2012 Ver 1.21
MC80F77088. MEMORY ORGANIZATION8.1 RegistersThis device has six registers that are the Program Counter(PC), a Accumulator (A), two index registers (X, Y), theStack Pointer (SP), and the Program Status Word (PSW).The Program Counter consists of 16-bit register.PCHAXYSPPCLPSWACCUMULATORX REGISTERY REGISTERSTACK POINTERPROGRAM COUNTERPROGRAM STATUSWORDThe have separate address spaces for Program memory,Data Memory and Display memory. Program memory canonly be read, not written to. It can be up to 8K bytes of Programmemory. Data memory can be read and written to upto 1024 bytes including the stack area. Display memoryhas prepared 27 nibbles for LCD.Generally, SP is automatically updated when a subroutinecall is executed or an interrupt is accepted. However, if itis used in excess of the stack area permitted by the datamemory allocating configuration, the user-processed datamay be lost.The stack can be located at any position within 100 H to15F H of the internal data memory. The SP is not initializedby hardware, requiring to write the initial value (the locationwith which the use of the stack starts) by using the initializationroutine. Normally, the initial value of “15F H” isused.Stack Address (100 H ~ 15F H )15 8 701SPFigure 8-1 Configuration of RegistersAccumulator: The Accumulator is the 8-bit general purposeregister, used for data operation such as transfer, temporarysaving, and conditional judgement, etc.The Accumulator can be used as a 16-bit register with YRegister as shown below.Hardware fixedCaution:The Stack Pointer must be initialized by software becauseits value is undefined after RESET.Example: To initialize the SPYYALDX #05FH ;TXSP;SP ← 05F HATwo 8-bit Registers can be used as a “YA” 16-bit RegisterFigure 8-2 Configuration of YA 16-bit RegisterX, Y Registers: In the addressing mode which uses theseindex registers, the register contents are added to the specifiedaddress, which becomes the actual address. Thesemodes are extremely effective for referencing subroutinetables and memory tables. The index registers also have increment,decrement, comparison and data transfer functions,and they can be used as simple accumulators.Stack Pointer: The Stack Pointer is an 8-bit register usedfor occurrence interrupts and calling out subroutines. StackPointer identifies the location in the stack to be accessed(save or restore).Program Counter: The Program Counter is a 16-bit widewhich consists of two 8-bit registers, PCH and PCL. Thiscounter indicates the address of the next instruction to beexecuted. In reset state, the program counter has reset routineaddress (PC H :0FF H , PC L :0FE H ).Program Status Word: The Program Status Word (PSW)contains several bits that reflect the current state of theCPU. The PSW is described in Figure 8-3. It contains theNegative flag, the Overflow flag, the Break flag the HalfCarry (for BCD operation), the Interrupt enable flag, theZero flag, and the Carry flag.[Carry flag C]This flag stores any carry or borrow from the ALU of CPUafter an arithmetic operation and is also changed by theShift Instruction or Rotate Instruction.December 3, 2012 Ver 1.21 21
Page 1 and 2: ABOV SEMICONDUCTOR Co. Ltd.8-BIT SI
Page 3 and 4: MC80F7708Table of Contents1. OVERVI
Page 5 and 6: MC80F77081. OVERVIEW1.1 Description
Page 7 and 8: MC80F77081.3 Development ToolsThe M
Page 9 and 10: MC80F77081.4 Ordering InformationDe
Page 11 and 12: MC80F77083. PIN ASSIGNMENT44MQFP(To
Page 13 and 14: MC80F77085. PIN FUNCTIONV DD : Supp
Page 15 and 16: MC80F7708PIN NAMEPin No.Primary Fun
Page 17 and 18: MC80F7708R43 (X IN ), R42 (X OUT )X
Page 19 and 20: MC80F77087. ELECTRICAL CHARACTERIST
Page 21 and 22: MC80F77087.4 LCD Characteristics(T
Page 23: MC80F77081/f MCPt MCPW t MCPWX IN0.
Page 27 and 28: MC80F7708At execution of aCALL/TCAL
Page 29 and 30: MC80F7708AddressProgram Memory0FFC0
Page 31 and 32: MC80F77088.3 Data MemoryFigure 8-8
Page 33 and 34: MC80F7708Address Register Name Symb
Page 35 and 36: MC80F77088.4 Addressing Mode2The MC
Page 37 and 38: MC80F7708Y indexed direct page (8 b
Page 39 and 40: MC80F77089. I/O PORTSThe MC80F7708
Page 41 and 42: MC80F7708R1 Data RegisterR1R1 Direc
Page 43 and 44: MC80F7708R6 PortsR6 is an 8-bit CMO
Page 45 and 46: MC80F7708The SCMR should be set to
Page 47 and 48: MC80F7708CKCTLR7 6 5 4 3 2 1 0- - S
Page 49 and 50: MC80F7708TM0, TM2 (Timer0, 2 Mode C
Page 51 and 52: MC80F7708T2 (Timer2 Register)R R R
Page 53 and 54: MC80F7708TM2Bit : 7 6 5 4 3 2 1 0-
Page 55 and 56: MC80F7708should be set to “1” r
Page 59 and 60: MC80F7708T0,1,2,3nn-1This value is
Page 63 and 64: MC80F7708~~f MAINT1~ ~00 01 02 03 0
Page 65 and 66: MC80F7708WTCK[2:0]f SUBf MAIN ÷2 8
Page 67 and 68: MC80F7708Sour ClockBIT OverflowBina
Page 69 and 70: MC80F7708ADCM (A/D Converter Mode R
Page 71 and 72: MC80F770816. BUZZER OUTPUT FUNCTION
Page 73 and 74: MC80F770817. INTERRUPTSThe MC80F770
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MC80F7708IENH (Interrupt Enable Hig
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MC80F7708The following method is us
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MC80F770817.4 External InterruptThe
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MC80F770818.1 Control of LCD Driver
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MC80F770818.2 LCD BIAS ControlThe M
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MC80F770818.4 Control Method of LCD
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MC80F770818.5 Duty and Bias Selecti
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MC80F7708RECEIVERXEACKTX_CLK1 / 2(D
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MC80F7708BRGCR0R/W R/W R/W R/W R/W
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MC80F770820. OPERATION MODEThe syst
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MC80F7708.Oscillator(X IN )Internal
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MC80F7708Oscillator(X IN pin)~~~Int
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MC80F770822. OSCILLATOR CIRCUITThe
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MC80F77081 2 3 4 5 6 7System ClockR
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MC80F7708The BIR of MC80F7708 has 8
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MC80F7708The oscillation fail proce
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MC80F7708all of ABOV FLASH/OTP devi
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MC80F770828. IN-SYSTEM PROGRAMMING2
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MC80F770828.3 Hardware Conditions t
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MC80F770828.6 Reference ISP Circuit
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MC80F7708APPENDIXDecember 3, 2012 V
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MC80F7708December 3, 2012 Ver 1.21i
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MC80F7708OP BYTE CYCLENO. MNEMONICC
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MC80F770816-BIT OperationNO.MNEMONI
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MC80F7708Control Operation & Etc.NO
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