SM-1D1.0032 - Ansaldo STS

1D1.0032Sleep Mode PCBNoticeThis module is one of a series of modules that describe thecomponents of the MICROLOK II system.1D1.0032, Rev. 1, November 2010 SM6800B 1-1

NoticesProprietary NoticeThis document and its contents are the property of Ansaldo STS USA,Inc. (formerly known as Union Switch & Signal Inc., and hereinafterreferred to as "ASTS USA"). This document is furnished to you on thefollowing conditions: 1.) That no proprietary or intellectual propertyright or interest of ASTS USA is given or waived in supplying thisdocument and its contents to you; and, 2.) That this document and itscontents are not to be used or treated in any manner inconsistent withthe rights of ASTS USA, or to its detriment, and are not to be copied,reproduced, disclosed or transferred to others, or improperly disposedof without the prior written consent of ASTS USA.Copyright © 2009, Ansaldo STS USA1000 Technology Drive, Pittsburgh, PA USA 15219-3120645 Russell Street, Batesburg, SC 29006www.ansaldo-sts.com/usaAll rights reserved.Revision Historyrev. ISSUE DATE REVISION DESCRIPTION0 November 2009 Revised SM 6800H to make first issue.0.a November 2009 Revised after Steve Bodnar review.0.b November 2009 Revised after Bernard Clement review.0.c November 2009 Revised after engineering technical review.0.d December 2009 Revised after FTR review.1-2 SM6800B 1D1.0032, Rev. 1, November 2010

1. SLEEP MODE DESCRIPTIONSleep Mode DescriptionThe Sleep Mode PCB (N17064901) allows a MICROLOK II unit to enter low power mode anddraw very little battery power. The MICROLOK II unit can be awakened to a fully functionalmode by a wake-up radio signal or through the rails in response to a Microtrax track message.Under normal circumstances, when a train is not in the area, all of the MICROLOK II units willbe in a low power mode awaiting instructions to verify the integrity of the track circuit. Whenrequested, the MICROLOK II Sleep Mode Unit will monitor the integrity of the rails usingMICROTRAX Track PCBs and report any broken rail condition.Wake-up can also be accomplished by pressing the East and West pushbuttons on the front panelof the Sleep Mode PCB1.1. Operation1.1.1. Power RequirementNominal Input: 12 VDC (9.8 VDC minimum to 16.2 VDC maximum)Nominal CurrentOperation Mode: 1 Ampere (not including radio current)In Sleep Mode: 0.1 Ampere (not including radio currentMinimum Startup: 11.5 VDCMaximum Battery Ripple: 0.5 VP-P1.1.2. East and West Radio Wake-Up InputsNominal Input: 12 VDC (9.8 VDC minimum to 16.2 VDC maximum)Nominal Wake-Up Response Time (from initial radio reception to activation of Track Clear orTrack Not Clear): Up to 60 seconds1.1.3. System to Radio OutputsLoad Voltage Output Range: 60 volts maximumLoad Current Output Range: 3 amps maximum at 70°C and 6 amps maximum at 25°C1.1.4. Auxiliary East Input and Auxiliary West InputMinimum Input Voltage to ensure an ON State: 9.5 VDCMaximum Sustained Input Voltage: 34 VDCInput Voltage to Ensure an OFF State: 7.0 VDC or less1D1.0032, Rev. 1, November 2010 SM6800B 1-3

Sleep Mode Description1.1.5. Radio System Contacts to Request a Wake-UpThe radio system contacts must be isolated dry contacts and able to handle 0.100 amp. Two arerequired for the system; one for the East Wake-Up Input and one for the West Wake-Up Input.1.1.6. Restore to Sleep Mode OperationResponse TimeWake-up time is one minute. The MICROLOK II Sleep Mode unit willwake-up in response to a single contact closure (East Radio Wake UP,West Radio Wake Up, East track Wake UP, or West Track Wake Up) ofone second or longer.The MICROLOK II Sleep Mode unit will return to Sleep mode after theloss of two consecutive inputs (East Clear, East Not Clear, West Clear,West Not Clear, East, or West) within 30 seconds.When awakened by use of the front panel pushbuttons, the MICROLOK IISleep Mode unit will remain in operation for one hour.1.2. System PCBsThe following printed circuit boards are used in the examples given in this manual for theMICROLOK II Sleep Mode system:• MICROTRAX Track PCB (N451910-0701)• MICROTRAX Track Panels PCB (N451835-0101)• Sleep Mode PCB (N17064901)• CPU PCB (N17061301)• 8In/8Out PCB (N17061601)• Power Supply PCB (N16661203)The MICROTRAX Track PCB, MICROTRAX Track Panels PCB, and Sleep Mode PCB mustbe used in the system. Other CPU PCBs, In/Out PCBs, and Power Supply PCBs than those listedabove, may be used.1-4 SM6800B 1D1.0032, Rev. 1, November 2010

2. SLEEP MODE PCBSleep Mode PCB – N17064901Sleep Mode PCB2.1. User InterfaceThe front panel contains six LEDs and two pushbutton switches. See Figure 2–1.Table 2-1.MICROLOK IIPCB Front Panel LEDs and SwitchesRefFigure 2–1Label Device Purpose1 SLEEP LED LED (Yellow)2 EAST TRACK WAKE-UP LED (Yellow)3 WEST TRACK WAKE-UP LED (Yellow)4 EAST RADIO WAKE-UP LED (Yellow)5 WEST RADIO WAKE-UP LED (Yellow)6 TEST LED (Yellow)78EAST TRACK PUSH TOTESTWEST TRACK PUSH TOTESTPushbuttonSwitchPushbuttonSwitchFlashes every 3 to 4 seconds when thesystem is in Sleep Mode.Lights when the Wake-Up signal is receivedfrom the East End track circuit.Lights when the Wake-Up signal is receivedfrom the West End track circuit.Lights when the Wake-Up signal is receivedfrom the East End radioLights when the Wake-Up signal is receivedfrom the West End radioLights when either the East Track or theWest Track PUSH TO TEST pushbutton ispressedPuts the Sleep Mode PCB into Test Mode inthe East direction allowing a technician totroubleshoot the system for a period of timethat is specified in the application by theuser. The switch must be held down for aminimum of 0.5 second to activate the test.Puts the Sleep Mode PCB into Test Mode inthe West direction allowing a technician totroubleshoot the system for a period of timethat is specified in the application by theuser. The switch must be held down for aminimum of 0.5 second to activate the test.1D1.0032, Rev. 1, November 2010 SM6800B 2-1

Sleep Mode PCB123456SLEE P(WHEN FLASHING )EAST TRACKWAKE -UPWEST TRACKWAKE - UPEAST RADIOWAKE - UPWEST RADIOWAKE - UPTES T7EAST TRACKPUSH TO TEST8WEST TRACKPUSH TO TESTSLEEP MODEFigure 2–1. Sleep Mode PCB Front Panel Detail2-2 SM6800B 1D1.0032, Rev. 1, November 2010

Sleep Mode PCB2.2. I/O InterfaceFigure 2–2 shows a typical interface wiring diagram.48-pin ConnectorPin No.SW1SW2SW3SW4SW5SW6SEL+E32 WhiteE30 BrownC30 RedA30OrangeE28 YellowC28GreenA28BlueTo BoardAddressingCircuitsWEST NOT CLEARWEST CLEARWEST NOT CLEARWEST CLEAREAST NOT CLEAREAST CLEAREAST NOT CLEAREAST CLEARWTWUSLEEPETWU(INPUT)(INPUT)(OUTPUT)(OUTPUT)(OUTPUT)(OUTPUT)(INPUT)(INPUT)(OUTPUT)(OUTPUT)(OUTPUT)(OUTPUT)(OUTPUT)(INPUT)(OUTPUT)AddressSelectPCBGNDA26BlackE2E4C2A2C4A4E6E8C6A6C8A8E12E14C12SLEEP MODE PCBN17064901RSETORE(INPUT)C14B12N12(INPUT)(INPUT)E16E24WRWU(OUTPUT)E10ERWU(OUTPUT)C10TEST(OUTPUT)A10STAY AWAKE(INPUT)E20EAST(INPUT)E28WEST(INPUT)E301D1.0032.3202.00WAKE AWAKE B(INPUT)(INPUT)E32C32Figure 2–2. Sleep Mode PCB Typical Interface Wiring1D1.0032, Rev. 1, November 2010 SM6800B 2-3

Sleep Mode PCB2.3. PCB KeyingEach type of ASTS USA PCB has a different combination of six keying fingers.Keying fingers are designated by ASTS USA. Their purpose is to ensure that the PCB is beinginserted into its proper cardfile slot. Therefore, keying tabs must not be removed or altered bythe user. Table 2–2 lists the keying for the MICROLOK II Sleep Mode PCB.Table 2–2.PCB KeyingPRINTED CIRCUITBOARDPART NO.KEYING PLUG LOCATION1 2 3 4 5 6 7 8 9 10 11 12Sleep Mode PCB N17064901 The "" in Table 2–2 indicates a keying tab removed on the PCB connector and a keying pluginstalled on the motherboard connector. Correspondingly, no entry in the table indicates a keyingtab not removed on the PCB connector and no keying plug installed on the motherboardconnector. See Figure 2-3.96-pin (Female)Connector onCardfileMotherboardKeyingPlugNo.96-pin (Male)Connector on PCBInsert Keying PlugJ709146-0473••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• •••••••••••123456789101112PrintedCircuitBoardAdjacentKeying PlugConnector(Female)AdjacentKeying PlugConnector(Male)PCB KeyingTabs Set atFactoryFigure 2-3. Typical Keying Tab and Pin Arrangement2-4 SM6800B 1D1.0032, Rev. 1, November 2010

Sleep Mode PCB2.4. System CardfilesThe systems that support the use the Synchronization PCB listed in Table 2-3.Table 2-3.Synchronization PCB System ApplicationsUS&S PCBPART NO.N17064901MICROLOK IIMICROLOK II HBAPPLICABLE CARDFILESENDPOINTLED12INTERMEDIATEI-LOKGENISYS II2.5. Software CompatibilityRefer to the MICROLOK II Application Programming Guide to verify that this PCB is compatiblewith the MICROLOK II executive software.1D1.0032, Rev. 1, November 2010 SM6800B 2-5

Sleep Mode PCB2-6 SM6800B 1D1.0032, Rev. 1, November 2010

3. INSTALLATIONInstallationFigure 3-1 is a typical example of a terminal strip wiring for a Sleep mode PCB in aMICROLOK II system. Figure 3-1 illustrates the terminal block layout for terminating theinput/output and power wiring used for a typical Sleep Mode installation. The terminating strip isnot included with the Sleep Mode PCB and must be ordered separately.3.1. Power Hookup1. Apply B12 (+12 VDC) to the On/Off Switch located on the left side of the terminalblock.2. Apply N12 (- 12 VDC) to position 10A on the terminal block.NOTEUse #14 AWG wire for the B12 and N12 power input lines. Strip a0.37” length of the end of the wires before attaching them to theterminal block. Use a WAGO screwdriver to access the On/OffSwitch screws and the connections to the WAGO “C” Railterminal blocks. WAGO screwdriver Part Numbers are either#210-119 or 210-257 not included.3.2. Radio Inputs to the Sleep Mode System1. Apply the West Radio Wake-up signal wires (normally open isolated dry contacts,Section 1.1.5) to the Sleep Mode System at positions 40B and 41A of the terminal block.2. Apply the East Radio Wake-up signal wires (normally open isolated dry contacts, Section1.1.5) to the Sleep Mode System at positions 39A and 40A of the terminal block.3.3. Radio Outputs from the Sleep Mode System1. Apply the East Clear Output contact closures to the radio interface inputs. They arelocated on the Sleep Mode System terminal block at positions 23A and 24A.2. Apply the East Not Clear Output contact closures to the radio interface inputs. They arelocated on the Sleep Mode System terminal block at positions 25A and 26A.3. Apply the West Clear Output contact closures to the radio interface inputs. They arelocated on the Sleep Mode System terminal block at positions 27A and 28A.4. Apply the West Not Clear Output contact closures to the radio interface inputs. They arelocated on the Sleep Mode System terminal Block at positions 29A and 30A.1D1.0032, Rev. 1, November 2010 SM6800B 3-1

Installation3.4. MICROTRAX Input Wiring from the MICROLOK II Sleep Mode Unit to theTrack Interface Panel Wiring1. Attach a 14 AWG wire from the Sleep Mode System East Side of the Insulated Joint(+Input of the Track Interface Panel) to the terminal block at position 15A; attach a 14AWG wire from the Sleep Mode System East Side of the Insulated Joint (-Input of theTrack Interface Unit) to the terminal block at position 16A.2. In a similar manner attach 14 AWG wires from the Sleep Mode System West Side of theInsulated Joint (+Input of the Track Interface Panel) to the terminal block at positions15A and from the West Side of the Insulated Joint (-Input of the Track Interface Panel) tothe terminal block at position 18A.3. Connect the MICROTRAX Output wiring from the Track Interface Panel to the track byattaching two 6 AWG to 9 AWG wires from the Track Interface Panel output AREMAterminals (+T and –T) to the track.3.5. East and West Auxiliary InputsEast and West Auxiliary Inputs (EAUX and WAUX) can be used with a slide fence, a high waterdetector, or switch machine correspondence contact to block transmission of a Track Clearmessage when the contact is open. Rewiring of the WAGO terminal strip is required to activatethese functions. The required rewiring consists of:1. Remove jumpers 48A to 54A and 54B to 56B.2. Add connection over a front contact from 48A to 54A (EAUX) and a connection over afront contact from 56A to 48C (WAUX).The completed wiring is shown in Figure 3-1.3-2 SM6800B 1D1.0032, Rev. 1, November 2010

Installation678List of Hard Jumpers789101112111213505152515253Tranzorb5KP16AEast sideof IJTrack InterfacePanelsWest sideof IJList of Wire Jumpers6B 48B 14B 47B 54B 56B7B 40C 39B 61B 55B 57B9B 21B 41B 62B 57A 59A11B 50B 48A 54A 58B 60B13C 22B 50A 55A fdadsadsaaaEast ClearEast Not ClearWestWestClearNotClearL+L-L+L-T+T-T+T-Contact closures for radio interfaceContacts of Radio Systemto Request Wake-UpEastWestCan be used forslide fence, highwater detection, orswitch positionindication to blocktransmission oftrack clear.MLKII - 8IN.8OUTInputs Outputs1. Test East Clear2. ETWU East Not Clear3. WTWU West Clear4. ERWU West Not Clear5. WRWU Restore6. EAUX Stay Awake7. WAUX Spare8. E or W Radio Spare1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63E22E24B12N12Track A+Track A-Track B+Track B-A12A14A16A18C6Wake AE32 Wake AWake BC32 Wake BE16B12N12E24C8A8C6A6C4A4C2A2E8E6E4E2C14E28Contacts on Sleep boardA2A4A8A10A6A12E4A4C8IN 1-IN 3-IN 5-E2C2A2E6C6OUT 1OUT 2OUT 3OUT 4OUT 5IN 1+IN 2+IN 3+IN 4+IN 5+C4 IN 2-E8A6A8E12E14C12C14IN 4-IN 6+IN 6-IN 7+IN 7-IN 8+IN 8-B12B12SleepE30A10C12E12C10E10E14Spare OUTSpare OUTEAUXWAUXRadio wake-upSpare1N4007DiodeONOFF1N4007Diode250 HzN12N12East ClearEast Not ClearWest ClearWest Not ClearRestoreEastWestTestETWUWTWUERWUWRWUSleepRow 8 from VCORN12CPU BoardPower Supply BoardC24B12E18C18A18E20C20A20E22C22A24E24E26E6A2C2A6+12-12-12 from VCOROUT 6OUT 7OUT 8B12N12N12E20C26E26-12250 HzStay AwakeWrapsbehindswitchtobottomof fuse terminal block.C1 from VCORA1 from VCORRow 7 from VCOR10 ampere fuse.Row “A”A B CRow “B”Row “C”B12Sleep BoardIN8.OUT8 BoardTrack BoardID1.0032.3201.00Figure 3-1. Terminal Block Layout1D1.0032, Rev. 1, November 2010 SM6800B 3-3/3-4

4. OPERATION4.1. Theory Of Operation for the Sleep Mode Printed Circuit BoardOperationSee Figure 4-1 for the following Sleep Mode Printed Circuit Board (PCB) Operation.A1 and A2 are identical in operation - the only difference is that A1 is associated with theMICROTRAX East Track signal and A2 is associated with the MICROTRAX West Tracksignal. The input to each section is first bandpass-filtered (center frequency = 2.2 Hz) and thenlevel-detected. If the signal exceeds the level detector threshold continuously for more than 1.5seconds, its latching output will set a flip-flop that in turn enables the Power Supply Shutdownpin, which allows the MICROLOK II unit to turn on (as described in A7).A3 receives the Radio East Wake-up, Radio West Wake-up, East Test Switch, and West TestSwitch inputs. The Radio East Wake-up and Radio West Wake-up inputs are each opticallyisolated from the radio by 2500 V rms via solid state relays, which in turn drive two separateone-shots (one for the East and one for the West). The input to each one-shot must be presentcontinuously for more than 470 milliseconds, in which case the one-shot will set a flip-flop anddrive enable the Power Supply Shutdown pin, which allows the MICROLOK II unit to turn on(as described in A7).The East and West Test Switch inputs are controlled by two separate momentary pushbuttonswitches located on the front panel of the Sleep Mode PCB. The contacts of these switches areessentially "ORed" with the appropriate Radio Wake-up inputs, which means that a test switchmust be pressed for at least 470 milliseconds to be recognized.There are four outputs associated with A3: the East and West Wake-up signals (which resultfrom either Radio or Test Switch activation), the Test output (which responds to either TestSwitch), and a "diode-ORed" East/West Radio Wake-up signal (which responds to either Radiocontact).A4 contains the 5-volt analog voltage references for the two level detectors in A1 and A2. It alsocontains the Master Reset circuitry for initial power-up to the Sleep Mode PCB. Through someadditional gating circuitry, the Master Reset can also be controlled by a MICROLOK II outputbit (Restore Request) to reset the entire Sleep Mode PCB. The Stay Awake is also controlled bya MICROLOK II output bit. The Stay Awake is used to override the Master Reset by preventingthe unit from entering Sleep mode, but still allowing the flip-flops on the Sleep Mode PCB to becleared.1D1.0032, Rev. 1, November 2010 SM6800B 4-1

Operation(A)(B)(C)(D)(E)VOLTAGE REFERENCE INPUTRESETA1MICROTRAX EASTTRACK INPUTMICROTRAX EAST TRACK INPUT , FILTERED LEVELDETECTORS AND FLIP -FLOP OUTPUTMICROTRAX WESTTRACK INPUTMICROTRAX WEST TRACK INPUT , FILTERED LEVELDETECTORS AND FLIP -FLOP OUTPUTVOLTAGE REFERENCE INPUTRESETA2+12 VRELAYCONTACTSAREREQUESTSFROMRADIOREWURWWUETSWWTSWABOVE PUSH BUTTONSWITCHES AREON THE SLEEP PCBA3RADIO EAST AND RADIO WESTWAKE-UP REQUESTS AND FLIP -FLOP OUTPUTSANDEAST AND WEST TEST SWITCH REQUESTSAND FLIP-FLOP OUTPUTSRESETTA4RESTOREREQUESTRESET ONPOWER UPVref.RESTOREREQUESTRESTORE REQUEST ,RESET ON POWER UPANDANALOG VOLTAGE REFERENCESTAY AWAKEA6EAST/WESTSTAY AWAKERADIO WAKE-UPA5ETWUWTWUERWUWRWUTESTMICROLOK8IN/8OUTPCBECENCWCWNCOUTPUTS (4)TO RADIOOPTICALLY ISOLATED MOSFETSEAST CLEAREAST NOT CLEARWEST CLEARWEST NOT CLEAREAST AUXWEST AUXTO RADIOINPUTSETWUWTWUERWUWRWU(A)ETWU(B)WTWUA7POWER SUPPLYSHUTDOWNLOGICAL OUTPUTTO MICROLOKPOWER SUPPLYSHUTDOWNSLEEP OSCILLATORLED OUTPUT(C)ERWU(D)WRWU(E)TESTETWU = EAST TRACK WAKE - UPWTWU = WEST TRACK WAKE - UPERWU = EAST RADIO WAKE - UPWRWU = WEST RADIO WAKE -UPEC = EAST CLEARENC = EAST NOT CLEARWC = WEST CLEARWNC = WEST NOT CLEARFigure 4-1. Sleep Mode Block Diagram4-2 SM6800B 1D1.0032, Rev. 1, November 2010

OperationA5 provides optical isolation of the four signals that may be sent to the Radio through four solidstate relays. The relays are controlled by the output section of the IN8.OUT8 PCB for the foursignals which are:East ClearEast Not ClearWest ClearWest Not ClearTwo outputs may be sent to the Radio simultaneously (one East and one West).A6 shows the interface between the Sleep Mode PCB and the MICROLOK II IN8.OUT8 PCB.Five Inputs to the IN8.OUT8 PCB (labeled A, B, C, D, and E) were previously described in A1,A2, and A3. The East/West Radio Wake-up is an input from A3. The East and West Auxiliaryinputs may be wired as shown in Figure 3-1 or to slide fence detectors, high water detectors,etc... These Auxiliary inputs must be "ON" in order to allow East Clear or West Clear signals tobe sent to the radio. The Restore Request Output and the Stay Awake Output is processed in A4,and the four Radio Outputs are handled in A5.The input signals to A7 consist of the Stay Awake signal and the four wake-up signals - EastTrack, West Track, East Radio/Test, and West Radio/Test. A7 contains the logic gatingnecessary to “OR” any of the four main flip-flops (the four wake-up signals) to the Power SupplyShutdown pin; the presence of any one of these signals will allow the MICROLOK II unit to turnon. The presence of the Stay Awake signal will keep the MICROLOK II unit up and running,even if the Master Reset signal is present, which would normally put the MICROLOK II unit inSleep mode. Also in A7 is the Sleep astable oscillator circuit which turns ON and OFF a frontpanel Sleep LED every three seconds, as long as none of the four main flip-flops are set.Five LED’s are located on the PCB front panel. These LED's are driven by the four wake-upsignals and the Test signal.4.2. Typical MICROLOK II Vital Sleep Mode Unit Operation4.2.1. General OverviewThe information contained in this manual pertains to a typical MICROLOK II Vital Sleep Modeunit. For instance, the radios used in this description do not have to be used. The radios areexternal to the MICROLOK II unit, as long as the Sleep Mode PCB sees a physical input, it willwork the same as it does in the following description. Remember that the following descriptionis not a mandatory setup of the MICROLOK II Vital Sleep Mode; it’s just a "typical example".The MICROLOK II Vital Sleep Mode is a user programmable broken rail detection system thatis intended for dark territory as an aid for improving operational movement in these areas.MICROLOK II units are placed at each end of a track circuit. For a Sleep Mode application,MICROLOK II units at each location normally operate in the power down or sleep mode,drawing very little battery power. MICROLOK II units can be awakened to a functional state in1D1.0032, Rev. 1, November 2010 SM6800B 4-3

Operationone of two ways: either by a transmitted wake-up radio signal or through the rails in response toa MICROTRAX track message. As a train approaches a track circuit that is equipped withMICROLOK II Sleep Mode units, the locomotive will awaken the MICROLOK II unit via radiosignal (refer to Figure 4-2, MLK II A). After this unit has come out of reset, it will send a signaldown the track to wake up the unit on the other end of the track circuit (refer to Figure 4-2, MLKII B). After a valid signal has been sent back and forth between these two units, the unit that waswoken by the radio will return a signal back to the radio signifying the integrity of the rail. Theradio that is connected to the MICROLOK II unit will then transmit this same message back tothe locomotive. If rail integrity cannot be established, as would be the case with a broken rail,shunted track, or from auxiliary input status, means are provided to transmit a NOT CLEARstatus. The Vital Sleep Mode system is designed for bi-directional train traffic.Wake-UpSignalRadio #1Wake-UpSignalRadio #2Radio #3Track IntegrityTrack IntegrityTrack IntegrityWake-UpSignalMLKIIAMMLKIIBSTK #1 TK #2TK #3TK #4WEFigure 4-2. System Block DiagramWake-up can also be initiated via East and West push buttons on the Sleep Mode board. Whenawakened via the push buttons, operation is sustained for a time that is specified in theapplication program to allow time for trouble shooting. The Sleep operation can be restored tothe MICROLOK II unit by cycling power OFF to ON.Components for a typical Sleep Application will consist of radios on locomotives and at waysidelocations in conjunction with a MICROLOK II unit. The MICROLOK II unit includes:• A standard MICROLOK II CPU board, which holds the application logic• A Power Supply board with CPS, and a VCOR Relay• A MICROTRAX Track board• MICROTRAX Track Panels• An IN8.OUT8 board – an interface for the user to see how the MICROLOK II unit wasawakened and to see which signals are sent back to the radio4-4 SM6800B 1D1.0032, Rev. 1, November 2010

Operation• A Sleep Mode board – controls the power for the cardfile, interfaces with the radio andMICROTRAX Track board.Additionally, the exact operation of the entire Sleep Mode controlled territory is userprogrammable. Based on the application logic, the units can be customized to wake-up eachtrack circuit based on a radio request at each circuit; or once an end-unit is activated, it can beginthe wake-up process for the entire territory. Either one status can be reported for the entireterritory, or each circuit can report the status via a radio at each location. The MICROLOK IIunit can transmit CLEAR and/or NOT CLEAR track integrity signals to the wayside radio,which will be transmitted back to the locomotive. These features are all specified within theapplication logic.The MICROLOK II Sleep Mode unit can operate with trains traveling in areas without a passingside, in areas with a passing side, and in a user test mode (for troubleshooting purposes).4.2.2. Activation ExampleRADIO #1 RADIO #2 RADIO #3RADIO #4RADIO #5MLK IIAMLK IIBMLK IICMLK IIDMLK IIESMSMSMSMTK #1 TK #2 TK #3 TK #4WEFigure 4-3. System Block Diagram – Traveling West to EastUnder normal circumstances, when a train is not in the area, all of the MICROLOK II units willbe in a low power mode waiting instructions to verify the integrity of the track circuit. Assumingthe train is approaching from the West (see Figure 4-3), as it approaches TK#1, a radio messagefrom the train is sent to Radio #1 instructing MLK II A to check the status of TK#1. The radio1D1.0032, Rev. 1, November 2010 SM6800B 4-5

Operationmessage needs to be at least a one-second pulse in order for the MICROLOK II unit to wake up.MLK II A begins checking TK#1, which in turns activates MLK II B to also verify TK#1. Whenthe status of TK#1 is determined by MLK II A, an output is delivered to Radio #1. After thisindication is delivered to the radio, MLK II A and MLK II B will remain awake until MLK II Ahas not received an input from Radio #1 within a period of time that is defined in the applicationby the user.As the train approaches TK#2, a radio message is sent from the train to Radio #2 instructingMLK II B to check the status of TK#2. MLK II B begins checking TK#2 and sends a message toMLK II C, activating MLK II C to also verify TK#2. MLK II C will receive a wake signal fromthe track circuit, and MLK II C will respond to MLK II B saying that it verified the integrity ofTK#2.When the status of TK#2 is determined by MLK II B, an output is delivered to Radio #2.This process will continue for each section of track.While MLK II C is still awake, it can also receive a radio signal to verify the integrity of TK#2for the opposite direction. MLK II C will remain awake and send a response to Radio #3,clarifying the integrity of TK#2.The same rules apply, as in the previous paragraphs. As the train approaches TK#3, a radiomessage is sent from Radio #4 instructing MLK II D to check the status of TK#3. MLK II Dbegins checking TK#3, which in turn sends a message along the track to MLK II C while MLKII C is still awake. MLK II C will respond and send a return message to MLK II D, clarifyingthe integrity of TK#3.The basic system will provide two Auxiliary inputs. One Auxiliary input will be for the Eastdirection, and the second Auxiliary input will be for the West direction. For a unit to properlycheck the integrity of the track circuit, the Auxiliary input must be in a high state (in the ONposition). If the Auxiliary input is in a low state, and the Wake Request is from the radio, theMLK II unit will respond to the radio with a NOT CLEAR output. If one of the Auxiliary inputsdrops, the output to the radio will be a NOT CLEAR signal. If the MICROLOK II unit issending a CLEAR signal to the radio, and the Auxiliary input drops, then the output to the radiowill be a NOT CLEAR signal. If the MICROLOK II unit is sending a NOT CLEAR signal andthe Auxiliary input is picked, then the output to the radio will be a CLEAR signal as long as therail integrity can be established.4.2.3. Travel with a Passing Siding – West to EastUnder normal circumstances, when a train is not in the area, all of the MICROLOK II units willbe in a low power mode awaiting instructions to verify the integrity of the track circuit.Assuming the train is approaching from the West, as it approaches TK#1 (Figure 4-4), a radiomessage from the train is sent to Radio #1 instructing MLK II A to check the status of TK#1.The radio message will need to be at least a one-second pulse in order for the MICROLOK IIunit to wake up. MLK II A begins checking TK#1, which in turns activates MLK II B to alsoverify TK#1. When the status of TK#1 is determined by MLK II A, an output is delivered toRadio #1. After this indication is delivered to the radio, MLK II A and MLK II B will remain4-6 SM6800B 1D1.0032, Rev. 1, November 2010

Operationawake until MLK II A has not received an input from Radio #1 within a period of time that isdefined in the application by the user.As the train approaches TK#2, a radio message is sent from the train to Radio #2 instructingMLK II B to check the status of TK#2. MLK II B begins checking TK#2, which in turnsactivates MLK II C to also verify TK#2. When the status of TK#2 is determined by MLK II B,an output is delivered to Radio #2. This process will continue for each section of track.RADIO #1RADIO #2RADIO #3RADIO #4MLK IIAMLK IIBMLK IICMLK IIDSMSMSMTK #1 TK #2 TK #4WEFigure 4-4. System Block Diagram with a Passing Siding - West to EastThe basic system will provide two Auxiliary inputs. One Auxiliary input will be for the Eastdirection, and the second Auxiliary input will be for the West direction. For a unit to properlycheck the integrity of the track circuit, the Auxiliary input must be in a high state (in the ONposition). If the Auxiliary input is in a low state, and the Wake Request is from the radio, theMLK II unit will respond to the radio with a NOT CLEAR output. If one of the Auxiliary inputsdrops, the output to the radio will be a NOT CLEAR signal. If the MICROLOK II unit issending a CLEAR signal to the radio, and the Auxiliary input drops, then the output to the radiowill be a NOT CLEAR signal. If the MICROLOK II unit is sending a NOT CLEAR signal and1D1.0032, Rev. 1, November 2010 SM6800B 4-7

Operationthe Auxiliary input is picked, then the output to the radio will be a CLEAR signal as long as therail integrity can be established.When MLK II B receives a radio signal to wake up and verify the integrity of TK#2, MLK II Bwill send a message to MLK II C. MLK II C will receive a wake signal from the track circuit,and MLK II C will respond to MLK II B saying that it verified the integrity of TK#2. WhileMLK II C is still awake, it can also receive a radio signal to verify the integrity of TK#2 for theopposite direction. MLK II C will remain awake and send a response to Radio #3, clarifying theintegrity of TK#2.The same rules apply, as in the previous paragraph. As the train approaches TK#3, a radiomessage is sent from Radio #4 instructing MLK II D to check the status of TK#3. MLK II Dbegins checking TK#3, which in turn sends a message along the track to MLK II C while MLKII C is still awake. MLK II C will respond and send a return message to MLK II D, clarifyingthe integrity of TK#3.4.2.4. Sleep Test ModeEnter TEST Mode by pressing a pushbutton on the SLEEP Board for the direction to be tested.The unit at the other end will wake-up automatically if everything is OK. The units will stayawake for a period of time that is defined in the application by the user.If testing is complete, the operator can either let the units time out or turn the unit OFF and thenback ON. This will remove the signal to the other units and they will go to sleep.If the units are turned OFF, the operator must be aware of the following considerations:1. If the MASTER (EAST) side is turned OFF, the SLAVE (WEST) end will stay awake fora period of time that is defined in the application by the user, after the SLAVE detects theloss of the signal on the track. There is a slight possibility of the SLAVE unit reawakeningthe MASTER end if the MASTER side is turned off immediately after amessage was transmitted, and then the MASTER was immediately turned back on. If thisoccurs, both units will be in TRACK WAKE-UP Mode. The application should be set upso that both units will remain awake until they determine that they are both in TRACKWAKE-UP mode, then they will go back to sleep.2. If the SLAVE (WEST) side is turned OFF, the MASTER (EAST) end will stay awake fora period of time that is defined in the application by the user, after the MASTER detectsthe loss of the signal on the track. There is a higher possibility of the MASTER unit reawakeningthe SLAVE end because, once the MASTER is awake, the MASTER unit willtransmit every 6 seconds, unless the MASTER’s transmitter has been properly disabled inthe application. If this occurs, both units will be in TRACK WAKE-UP Mode. Theapplication should be set up so that both units will remain awake until they determine thatthey are both in TRACK WAKE-UP mode, then they will go back to sleep.4-8 SM6800B 1D1.0032, Rev. 1, November 2010

OperationTo prevent either unit from accidentally waking up the other unit after turning the power OFFthen ON, leave the unit OFF for a period of time that will allow bits to change state which willput the MICROLOK II unit into Sleep mode; again this is dependent upon how the application issetup. This will allow the other end to go back to sleep after loss of communication.1D1.0032, Rev. 1, November 2010 SM6800B 4-9

Operation4-10 SM6800B 1D1.0032, Rev. 1, November 2010

5. RAIL TEAM AND TECHNICAL SUPPORTRAIL Team and Technical SupportThe Rapid Action Information Link Team (RAIL Team) is a group of experienced product andapplication engineers ready to assist you to resolve any technical issues concerning this product.Contact the RAIL Team in the United States at 1-800-652-7276 or by e-mail atrailteam@ansaldo-sts.us.1D1.0032, Rev. 1, November 2010 SM6800B 5-1

RAIL Team and Technical SupportEnd of Manual5-2 SM6800B 1D1.0032, Rev. 1, November 2010