ADSP-219x/2191 DSP Hardware Reference, Introduction

ADSP-219x Architecture OverviewLow-Power OperationThe ADSP-2191 has four low-power options that significantly reduce thepower dissipation when the device operates under standby conditions. Toenter any of these modes, the DSP executes an IDLE instruction. TheADSP-2191 uses configuration of the bits in the PLLCTL register to selectbetween the low-power modes as the DSP executes the Idle. Dependingon the mode, an Idle shuts off clocks to different parts of the DSP in thedifferent modes. The low-power modes are:• Idle• Powerdown Core• Powerdown Core/Peripherals• Powerdown AllClock SignalsThe ADSP-2191 can be clocked by a crystal oscillator or a buffered,shaped clock derived from an external clock oscillator. If a crystal oscillatoris used, the crystal should be connected across the CLKIN and XTAL pins,with two capacitors connected. Capacitor values are dependent on crystaltype and should be specified by the crystal manufacturer. A parallel-resonant,fundamental frequency, microprocessor-grade crystal should be usedfor this configuration.If a buffered, shaped clock is used, this external clock connects to theDSP’s CLKIN pin. CLKIN input cannot be halted, changed, or operatedbelow the specified frequency during normal operation. This clock signalshould be a TTL-compatible signal. When an external clock is used, theXTAL input must be left unconnected.1-20 ADSP-219x/2191 DSP Hardware Reference