ADSP-219x/2191 DSP Hardware Reference, Introduction

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ADSP-219x Design AdvantagesADSP-219xDSP COREINTERRUPT CONTROLLER/TIMERS/FLAGSCACHE64× 24-BITINTERNAL SRAMTWO INDEPENDENT BLOCKSADDRESSDATAADDRESSDATAB L O C K 0B L O C K 1JTAGTEST &EMULATION6DAG14 × 4 × 16DAG24 × 4 × 16PM ADDRESS BUSDM ADDRESS BUSPROGRAMSEQUENCER242424DMAADDRESS24DMADATAEXTERNALPORTADDR BUSMUX22BUSCONNECT(PX)PM DATA BUSDM DATA BUS2416EXTERNAL MEMORYINTERFACEDATA BUSMUX16DATAREGISTERFILEINPUTREGISTERSRESULTREGISTERSMULT16×16-BITBARRELSHIFTERALUCOREINTERFACEI/O REGISTERS(MEMORY MAPPED)CONTROLSTATUSBUFFERSI/O PROCESSORHOST PORT18SERIAL PORTS(3)DMACONTROLLER 6SPI PORTS(2)UART PORT(1)242Figure 1-1. ADSP-219x/ADSP-2191 DSP Block DiagramFurther, the ADSP-219x addresses the five central requirements for DSPs:• Fast, flexible arithmetic computation units• Unconstrained data flow to and from the computation units• Extended precision and dynamic range in the computation units• Dual address generators with circular buffering support• Efficient program sequencing1-4 ADSP-219x/2191 DSP Hardware Reference
IntroductionUnconstrained Data Flow. The ADSP-219x has a modified Harvardarchitecture combined with a data register file. In every cycle, the DSPcan:• Read two values from memory or write one value to memory• Complete one computation• Write up to three values back to the register fileFast, Flexible Arithmetic. The ADSP-219x family DSPs execute all computationalinstructions in a single cycle. They provide both fast cycletimes and a complete set of arithmetic operations.40-Bit Extended Precision. The DSP handles 16-bit integer and fractionalformats (two’s-complement and unsigned). The processors carry extendedprecision through result registers in their computation units, limitingintermediate data truncation errors.Dual Address Generators. The DSP has two data address generators(DAGs) that provide immediate or indirect (pre- and post-modify)addressing. Modulus and bit-reverse operations are supported with memorypage constraints on data buffer placement only.Efficient Program Sequencing. In addition to zero-overhead loops, theDSP supports quick setup and exit for loops. Loops are both nestable(eight levels in hardware) and interruptable. The processors support bothdelayed and non-delayed branches.ADSP-219x Architecture OverviewAn ADSP-219x is a single-chip microcomputer optimized for digital signalprocessing (DSP) and other high speed numeric processingapplications. These DSPs provide a complete system-on-a-chip, integratinga large, high-speed SRAM and I/O peripherals supported by adedicated DMA bus. The following sections summarize the features ofADSP-219x/2191 DSP Hardware Reference 1-5
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