VS1063 Hardware Guide - VLSI Solution

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5 VS1063a Memory MapX-memoryAddress Description0x0000..0x17ff System RAM0x1800..0x187f User RAM0x1880..0x197f Stack0x1980..0x3fff System RAM0x4000..0xbfff ROM 32k0xc000..0xc0ff Peripherals0xc100..0xffff ROM 15.75kVS1063a HW GuideY-memoryAddress Description0x0000..0x17ff0x1800..0x187f0x1880..0x197f0x1980..0x3fff0x4000..0xdfff0xe000..0xffffSystem RAMUser RAMStackSystem RAMROM 40kSystem RAM5 VS1063A MEMORY MAPI-memoryAddress Description0x0000..0x0fff RAM0x0050..0x0fff User RAM0x1000..0x1fff -0x2000..0xffff ROM 56kand banked0xc000..0xffff ROM4 16kNote: The VS1063a Programmer’s Guide has a more accurate software memory map.PRELIMINARYVersion: 0.40, 2011-09-02 8
VS1063a HW Guide6 VS1063a Hardware Audio Paths6.1 VS1063a Hardware DAC Audio PathsRegistersDAC_LEFTDAC_RIGHTRegistersDAC_FCTLLDAC_FCTLHDACSRCRegisterSRC_CONTROLResamplerSRCRegistersSRC_LEFTSRC_RIGHTRegisterDAC_VOLSidestreamSDMRegistersSDM_LEFTSDM_RIGHT6 VS1063A HARDWARE AUDIO PATHSSigma−deltamodulatorRegisterSDM_CONTROLAnalogdriverFigure 1: VS1063a ADC and DAC data paths with some data registersFigure 1 presents the VS1063a Hardware DAC audio paths.The main audio path starts from the DAC register (Chapter 7.3) to the high-fidelity, fully digitalDAC SRC (Digital-to-Analog Converter SampleRate Converter), which low-pass filters and interpolatesthe data to the high samplerate of XTALI/2 (nominally 6.144 MHz). This 18-bit data isthen fed to the volume control. It then passes through the sigma-delta modulator to the analogdriver and analog Left and Right signals.The user may resample and record the data with the Resampler SampleRate Converter (Chapter7.11). Because there is no automatic low-pass filtering, it is the user’s responsibility to avoidaliasing distortion.The user may add a PCM sidestream with the Sidestream Sigma-Delta Modulator input (Chapter7.12). As is the case with the Resampler SampleRate Converter, hardware doesn’t offerlow-pass filtering, so sufficient aliasing image rejection is the responsibility of the user.PRELIMINARYVersion: 0.40, 2011-09-02 9LeftRightCBUFI2S
Page 1 and 2: VS1063a HW GuideVS1063a HARDWARE GU
Page 3 and 4: ContentsVS1063a HW GuideCONTENTSVS1
Page 5 and 6: List of FiguresVS1063a HW GuideLIST
Page 7: VS1063a HW Guide4 The VSDSP Process
Page 11 and 12: 7 Hardware RegistersVS1063a HW Guid
Page 13 and 14: VS1063a HW Guide7 HARDWARE REGISTER
Page 15 and 16: 7.4 PLL ControllerVS1063a HW Guide7
Page 17 and 18: VS1063a HW Guide7.5 General-Purpose
Page 19 and 20: VS1063a HW Guide7.7 Universal Async
Page 21 and 22: VS1063a HW Guide7 HARDWARE REGISTER
Page 23 and 24: 7.8.3 Configuration TIMER_ENABLEVS1
Page 25 and 26: VS1063a HW Guide7.10 Analog-to-Digi
Page 27 and 28: VS1063a HW Guide7.12 Sidestream Sig
Page 29: VS1063a HW Guide9 Contact Informati

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