计算机组织与系统结构

计 算 机 组 织 与 系 统 结 构 

计 算 技术发展简史 

( 第二讲 ) 

程旭 

公元前 500 年 , 中国 , 算 盘 

古代 计 算 技术 

将位置标记的概念 (concept of positional notation), 引入 计 算 

2010 年 9 月 29 日 

北京大学 计 算 机 科学技术 系 

北京大学微处理器研究开发中心 



古代 计 算 技术 

12 世纪 

塔什干 (Tashkent) 的牧师 

1612, John Napier, 对数 

十七世纪 计 算 技术 

1622, William Oughtred, 计 算 尺 (slide rule) 


Mukhammad ibn Musa 

Al'Khowarizmi 

提出编写出达到一些目标的 

操作过程的概念 

并出版了一部以 “ 算 法 

(algorithm)” 为主题的书籍 


1880 的柱状 计 算 尺 (cylindrical Slide Rule), 

大约 200 英寸长 , 四位十进制精度 


北京大学微处理器研究开发中心


1642 年 , Pascal Machine 

•Mechanical M h i l Counter for addition and subtraction 

ti 

Pascal’s Calculator -- Pascalene(1642) 

•Counter Wheels for storing decimal numbers 

•Used as registers 

•One Register acted as Accumulator 

•Technical Innovations: 

•Automatic A t ti transfer of fCarry 

•Use of Complement Representation for negative 

numbers 





1671 年 , Gottfried Leibniz 


A Calculator that could perform multiplication and 

division as well as addition and subtraction 

Started with Pascal Calculator 

Added two additional sets of wheels that could 

perform multiplications and division by repetitive 

addition or subtraction 

Used Chains and Pulleys 



十八世纪和十九世纪 计 算 技术 

• 1750 Mechanical Weaving Technology 

• Jacquard Loom(1801) 

• Punched card for manual instruction first 

• Used mechanically in Jacquard Loom 

• Holes in the punched cards used for the 

control of the movement of parts of the loom 

• the first programmable process control 

machine 

• Operation under program control 



Jacquard 

Loom(1801) 



十九世纪二十年代 

Charles Babbage Difference Engine 

Designed to calculate the entries of a table automatically and 

transfer them via steel punches to an engraver’s plate 

• Could perform only addition and subtraction 

• Using Finite Difference methods a large number of functions 

could be calculated 

•Polynomials 

•Trigonometric Functions 

• Used a number of mechanical registers 

• Driven by steam engine to CRANK OUT the results 

• 3rd degree polynomials and 15 digit numbers 

• Automatic mulistep operations 



Charles Babbage 1791-1871 

Lucasian Professor of Mathematics, 

Cambridge University, 1827-1839 

Charles Babbage 

Difference Engine 1823 

Analytic Engine 1833 

The forerunner of modern digital computer! 

Application 

– Mathematical Tables – Astronomy 

– Nautical Tables – Navy 

Background 

– Any continuous function can be approximated by a 

polynomial --- Weierstrass 

Technology 

– mechanical - gears, Jacquard’s loom, simple 

calculators 

l 北京大学 计 算 机 科学技术 系 




Difference Engine 

A machine to compute mathematical tables 

Weierstrass: 

Any continuous function can be approximated by a polynomial 

l 

Any polynomial can be computed from difference tables 

An example 

f(n) = n 2 + n + 41 

d1(n) = f(n) - f(n-1) = 2n 

d2(n) =d1(n) - d1(n-1) 1) = 2 

f(n) = f(n-1) + d1(n) = f(n-1) + (d1(n-1) + 2) 

all you need is an adder! 

n 

d2(n) 

0 1 2 

2 

3 

2 

4 

2 

d1(n) 2 4 6 8 

f(n) 41 43 47 53 61 

Difference Engine 

1823 

Babbage’s g paper p is published 

1834 

The paper is read by Scheutz & his son in Sweden 

1842 

Babbage gives up the idea of building it; he is onto 

Analytic Engine! 

1855 

Scheutz displays his machine at the Paris World Fare 

Can compute any 6th degree polynomial 

Speed: 33 to 44 32-digit numbers per minute! 





Babbage’s 

Difference 

Engine 1 

1832 

Analytic Engine 

1833: Babbage’s paper was published 

conceived during a hiatus in the development of 

the difference engine 

Inspiration: Jacquard Looms 

looms were controlled by punched cards 

The set of cards with fixed punched holes 

dictated the pattern of weave ⇒ program 

The same set of cards could be used with 

different e colored o threads ⇒ numbers 

1871: Babbage dies 

The machine remains unrealized. 

It is not clear if the analytic engine could be built 

even today using only mechanical technology 





Babbage’s 

Difference Engine 2 

and 

Analytical Engine 

1834 Babbage Analytical Engine 

The Mill 

The Store 

Printer 

Punch 

Operation 

Cards 

Variable 

Cards 

Program 





Babbage Analytical Engine 

• The Store: Memory unit consisting of counter 

wheels 

• The Mill: The arithmetic unit capable of 4 operations 

used a pair of register and produced results stored 

in another register in the store 

• Operation Cards: Specified one of Four operations 

• Variable Cards: Specified the memory location to be 

used 

• Output: Printer or punch 

Analytic Engine 

The first conception of a general-purpose computer 

1. The store in which all variables to be operated upon, as 

well as all those quantities which have arisen from the 

results of the operations are placed. 

2. The mill into which the quantities about to be operated 

upon are always brought. 

The program ogam 

Operation variable1 variable2 variable3 

An operation in the mill required feeding two punched cards 

and producing a new punched card for the store. 

An operation to alter the sequence was also provided! 





The first programmer 

Ada Byron aka “Lady Lovelace” 1815-52 

52 

Babbage’s Influence 

Babbage’s ideas had great influence later 

primarily because of 

Luigi Menabrea, who published notes of 

Babbage’s lectures in Italy 

Lady Lovelace, who translated Menabrea’s 

notes in English and thoroughly expanded 

them. 

“... Analytic Engine weaves algebraic 

patterns....” 


Ada’s tutor was Babbage himself! 


In the early twentieth century - the focus shifted 

to analog computers but 

Harvard Mark I built in 1944 is very close in 

spirit to the Analytic Engine. 



Kelvin’s 

Tide 

Predictor 

(1876) 




古代及近代 计 算 技术 

公元前 500 年 , 中国 , 算 盘 

12 世纪 ,Al’Khowarizmi Khowarizmi, 算 法 

1612, John Napier, 对数 

1622, William Oughtred, 计 算 尺 (slide rule) 

1642, Blaise Pascal, 自动进位的加法 机 器 

齿轮驱动的拨盘 , 在窗口中显示累加和 

1822,Charles Babbage, 差分 机 (differential engine) 

单一功能的专用 机 器 

1833, 解析 机 (Analytical Engine) 

具有现代 计 算 机 的基本部件 ⇒ 计 算 机 之父 


二十世纪前叶 计 算 技术 

• 1932- Vannevar Bush’s mechanical 

computer(calculus) 

• Late 30’s - Zuse, Stibitz, Aiken - 

electomechanical computer 

• 1937~42 - Atanasoff-Berry Computer: first 

electronic digital computer 

Electomechanical Computers 

Limitations: 

• Inertia of Moving Parts-limits computation speed 

• Use of gears and levers etc. to move data is 

cumbersome and unreliable 

• Equipment bulk 

• 1943 - Turing and Newman -Colossus 

(Decryption) 

Computers with no moving parts! 





MIT Differential Analyzer (1930) 

Vannevar Bush’s MIT Differential Analyzer (1930) 

Vannevar Bush, MIT, built a large-scale differential analyzer with the additional 

capabilities of integration and differentiation; perhaps the largest computational 

device in the world in 1930. 





Konrad Zuse’s Z-1 (1935) 

a relay computer, using binary arithmetic 

Aiken’s Model-K(1937) 

Howard Aiken at Harvard 

University, whose work would 

come to fruition in 1944, and 

George Stibitz at Bell Telephone 

Laboratories who was looking 

at the use of telephone relays in 

doing arithmetic. He first 

constructed a relay driven 

arithmetic unit in 1937 (which 

he later called the Model-K 

since it was built on the 

Kitchen table) and from that 

small start built a number of 

relay machines that were in use 

during World War II 





Linear Equation Solver 

John Atanasoff, Iowa State University 

1930’s: 

Atanasoff built the Linear Equation Solver. 

It had 300 tubes! 

Application: 

Linear and Integral differential equations 

Background: 

Vannevar Bush’s Differential Analyzer 

--- an analog computer 

Technology: 

Tubes and Electromechanical relays 


Atanasoff decided that the correct mode of 

computation ti was by electronic digital it means. 


1936-39 Atanasoff/Berry Computer (ABC) 

• Special purpose 

- solving simultaneous equations 

Electronic digital computation 

Electronic switching 

Separate memory 

Memory regeneration 

Binary number system 

Vector processing 

Clocked control 

Capacitor-drum memories 


Scientific American August 1988 

pp. 90-96: Dr. Atanasoff’s Computer 


Colossus-Mark I (1943) 

IBM /Harvard Mark I (1944) 

The first large scale, automatic, general purpose, electromechanical calculator 

Built in 1944 in IBM Endicott 

laboratories 

Howard Aiken – Professor 

of Physics at Harvard 

Essentially mechanical but 

had some electromagnetically 

controlled 

relays and gears 

Weighed 5 tons and had 

750,000 components 

A synchronizing clock that 

beat every 0.015015 seconds 

(66Hz) 

Performance: 

0.3 seconds for addition 

6 seconds for multiplication 

1 minute for a sine calculation 

Broke down once a week! 





1937, Alan Turing 

While not using the practical 

technology of the era, Alan 

Turing developed the idea of a 

"Universal Machine" capable 

of executing any 

describable algorithm, and 

forming the basis for the 

concept of "computability". 

Perhaps more importantly 

Turing's ideas differed from 

those of others who were 

solving arithmetic problems 

by introducing the concept of 

"symbol processing". 

1937 年 , 当 A.M.Turing 提出图灵 机 概念时 , 

也许人们并不知道存储程序 计 算 机 对人类社会的 

真正意义 ; 然而 , 在此之后的半个多世纪 , 人们 

却在科学、技术 , 甚至哲学、法律等社会的各个 

领域都品味到 计 算 机 的强大震撼力。有些我们现 

在看来理所当然的处理器的特点 , 在 计 算 机 不长 

的历史上也的确经历了一个不短的认识过程。了 

解这个过程 , 包括其技术背景和器件工艺背景 , 

对我们研究将来的 计 算 机 以及用好现在的 计 算 机 

都是有益的。 





Generations 

“I think there is a world 

market for maybe five 

computers.” 

Thomas Watson Senior, 

Chairman of IBM, 1943 

1: 1950 ~ 59 Vacuum Tubes 

2: 1960 ~ 68 Discrete transistor 

3: 1969 ~ 77 ICs 

4: 1978 ~ ? LSI and VLSI 

5?: Japanese project 





The First Generation 

Use Vacuum Tubes for switching and storage. 

A Triode invented in 1906 became a building block. 

Structure? 

Turing: 

• In 1937 gave the mathematical foundations 

in terms of TURING MACHINE which can 

emulate any other computer. 

• He tried to build a computer ACE 

Automatic Computing Engine (ACE) was completed in 1947 

通用电子 计 算 机 的起源 





第一台通用电子 计 算 机 --ENIAC 

Electronic Numerical Integrator and Calculator 

1946 年 2 月 14 日 

J. Presper Eckert& 

John Mauchly 

Moore School 

University of Pennsylvania 

Size: 80 feet long 

8.5 feet high 

h 

18,000 vacuum tubes 

5000 additions/sec. 

The world’s first general-purpose electronic computer 

conditional Jump and be programmable, distinguished it from earlier ones 

Used for computing artillery firing tables 



ENIAC 

Inspired by Atanasoff and Berry, Eckert and Mauchly designed and built 

ENIAC (1943-45) at the University of Pennsylvania 

The first, completely l electronic, operational, general-purpose analytical 

l 

calculator! 

30 tons, 72 square meters, 200KW 

Performance 

Read R d in 120 cards per minute 

Addition took 200 μs, Division 6 ms 

1000 times faster than Mark I 

Not very reliable! 

Application: Ballistic calculations 

WW-2 Effort 

angle = f (location, tail wind, cross wind, 

air density, temperature, weight of shell, 

propellant charge, ... ) 



Accumulator 

28 vacuum tubes 

ENIAC was NOT a “stored program” device 

For each problem, someone analyzed the 

arithmetic processing needed and prepared p wiring 

diagrams for the computors to use when wiring the 

machine 

Process was time consuming and error prone 

Cleaning personnel often knocked cables out of 

their place and just put them back somewhere 





Wiring the machine 





Function Tables 

北京大学 计 算 机 科学技术 系 北京大学微处理器研究开发中心北京大学 计 算 机 科学技术 系 北京大学微处理器研究开发中心

Pulse Diagram 

ENICA: Electronic Numerical and Integrate Calculator 

Mauchly and Eckert 

• First General Purpose Computer: Was designed for 

ballistic calculations but was used for H-Bomb 

design 

• 30 Tons, 15,000 Square Ft., 18,000 Vacuum Tubes, 

140 KW 

• 5,000 additions per second 

• Used decimal arithmetic 

• Memory had 20 accumulators for 10 digit numbers 

• Programming required setting switches and 

plugging cables manually 





ENIAC 

Electronic Discrete Variable Automatic Computer (EDVAC) 



ENIAC’s programming system was external 

Sequences of instructions were executed 

independently of the results of the calculation 

Human H intervention i required to take instructions 

i 

“out of order” 

Eckert, Mauchly, John von Neumann and others 

designed EDVAC (1944) to solve this problem 

Solution was the stored program computer 

⇒ “program can be manipulated as data” 

First Draft of a report on EDVAC was published in 

1945, but just had von Neumann’s signature! 

In 1973 the court of Minneapolis attributed the 

honor of inventing the computer to John Atanasoff 



Stored Program Computer 

Technology Issues 

Program = A sequence of instructions 

How to control instruction sequencing? 

manual control 

calculators 

automatic control 

external (paper tape) Harvard Mark I , 1944 

Zuse’s Z1, WW2 

internal 

plug board ENIAC 1946 

read-only memory ENIAC 1948 

read-write memory EDVAC 1947 (concept ) 

– The same storage can be used to store program and data 

EDSAC 1950 Maurice Wilkes 

ENIAC ⇒ EDVAC 

18,000 tubes 4,000 tubes 

20 10-digit numbers 2000 word storage 

mercury delay lines 

ENIAC had many asynchronous parallel units 

but only one was active at a time 

BINAC : Two processors that checked each other 

for reliability. 

Didn’t work well because processors never 

agreed 





Dominant Problem: Reliability 

Mean time between failures (MTBF) 

MIT’s Whirlwind with an MTBF of 20 min. was perhaps the 

most reliable machine ! 

Reasons for unreliability: 

1. Vacuum Tubes 

2. Storage medium 

acoustic delay lines 

mercury delay lines 

Williams tubes 

Selections 

Reliability solved by invention of Core memory by 

J. Forrester 1954 at MIT for Whirlwind i project 

第一台可操作的存储程序 机 器 ---Mark-I 

The world’s first operational stored-program machine 

1948 年 , 曼彻斯特大学 , 小型 计 算 机 样 机 

存储器大小 :32 字 ( 可扩充到 8K 字 ) 

机 器字长 :32 位 

6 条指令 : 

jump 

load accumulator negative 

substract 

store accumulator 

test for zero 

stop 





第一台全面的、可操作的、存储程序 计 算 机 --EDSAC 

The world’s first full-scale,operational,stored-program l l t computer 

Maurice Wilkes,Cambridge University 

EDSAC: Electronic Delay Storage Automatic Calculator 

The von Neumann Machine 

Stored Program Computer 

IAS(Institute for Advanced Study) 

Computer 

1946 

1949 年 ,EDSAC 开始运行 

其基于累加器的 结 构 和其 

指令 系 统 设 计 

对以后一段时期的 机 器设 

计 有着重要影响 

Main 

Memory 

Arithmetic 

Logic 

Unit 

Program 

Control 

Unit 

I/O 

Equipment 





存储程序的思想即 构 成 计 算 机 程序 

的指令可同数据一样事先存放到存储器中 , 

然后由 计 算 机 自己一条条取出执行。 

这种思想很自然地引出了转移指令和 

可对指令的地址部分进行修改的概念 , 从 

而使一段程序的指令可以自动地被有意义 

地多次执行。 

IAS Computer 

• Main memory which stores both data and instructions 

• An arithmetic-Logic Unit capable of operating on binary 

data 

• A control unit which interprets the instructions in 

memory and causes them to be executed 

• Input and Output equipment operated by the control unit 

• 1000 words of 40 bits each 

• Signed Magnitude representation of numbers 

Instruction 

Format 

0 8 20 28 

Opcode Address Opcode Address 





Central Processing Unit 

Arithmetic-logic unit 

IAS Computer Details 

MQ AC 

Input- 

Arithmetic-logic circuits 

output 

equipment 

IAS: Institute for Advanced Study(1952) 

MBR 

IBR 

PC 

Instructions 

and ddata 

IR 

MAR 

Control Control 

circuits it 

Signal Address 

Program control unit 


Main 

Memory 




IAS Instruction Set 

•21 Instructions 

•Data Transfer 

•Unconditional Branch 

•Conditional Branch 

•ArithmeticA ti 

•Address Modify 

IAS 机 器的设 计 采用基于累加器的 结 构 , 

指令 系 统 含有五种指令 : 数据传送、无条件转移、 

条件转移、 算 术运 算 和地址修改。另外 ,IAS 可 

以从主存中一次取出两条指令 , 并且把不立 

即执行的指令存放在指令缓冲寄存器中。 

IAS 计 算 机 的设 计 , 是对前人工作的一个总 

结 , 它使存储程序的思想和 计 算 机 的设 计 紧密联 

系 在一起 , 从而开辟了 计 算 机 技术发展的广阔前 

景。他们的设 计 在 计 算 机 发展史上起到了承前启 

后的作用。 





Harvard Architecture 

ASCC-Reader(1944) 

• Separate memories for instructions 

and data 

• Named for Aiken’s Mark I ~ IV 

machines 

• Today used for separate caches 




The first large scale, automatic, 

general purpose, electromechanical 

calculator was the 

Harvard Mark I (AKA IBM 

Automatic Sequence Control 

Calculator [ASCC]) conceived by 

Howard Aiken in the late 1930's 

and implemented by Messrs. 

Hamilton, Lake, Durfee of IBM. The 

machine was intended to 

computer the elements of mathematical 

and navigation tables -- 

the same purpose as intended by 

Babbage for the Difference Engine. 

Aiken dedicated his early reports 

to 

Babbage, having been made 

aware of the piece of the 

Difference Engine at Harvard in 

1937. The ASCC was not a stored 

program machine but instead was 

driven by a paper tape containing 

the instructions. 


这个时期的 机 器主要利用电子 

管来实现。一般主存用静电管和延 

迟线 , 辅存用纸带、穿孔卡和延迟 

线。由于硬件的昂贵 , 这一时期的 

机 器大都采用基于累加器的 结 构 , 

而且仅能实现极少一些必须的 机 器 

指令 , 大多数 机 器的设 计 目的主要 

是用于进一步研究。 

计 算 机 产业的形成 

做为节约人类劳动工具的 计 算 机 , 只有在形成 

产业之后才可能在社会上得以广泛应用。 





Later of 1946, Eckert and Mauchly, in a patent dispute 

with the University of Pennsylvania, left the University to 

establish the first computer company -- Electronic Control 

Corp. with a plan to build the Universal Automatic 

Computer (UNIVAC). After many crises they built the 

BINAC for Northrup Aviation, and were taken over by 

Remington-Rand before the UNIVAC was completed. At 

the same time the Electronic Research Associates (ERA) 

was incorporated in Minneapolis and took their 

knowledge of computing devices to create a line of 

computers; later ERA was also assimilated into 

Remington-Rand. 

1951 年 6 月 ,Eckert-Mauchly 计 

算 机 公司开始交付 UNIVAC I 机 器 , 

这种 机 器售价为 250,000 美元 , 

共生产了 48 套 系 统 , 从而使之成 

为第一台成功的商业化 计 算 机 。 





UNIVAC-1(1951) 

UNIVAC Console 





1952 年 ,IBM 公司推出了它的 

第一台 机 器 -----IBM701, 在这台 

机 器中使用了威廉管 (William’s’ 

tube) 存储器。 

这种 机 器一共生产了 19 套 ; 租 

金为 $15,000/ 月。 

IBM 701 (1952) 





Whirlwind(1951) 

Jay Forrester, Bob Everett 

and others at MIT began 

work on a simulator for the 

Air Force in late 1946, but 

changed their minds about 

the use of analog 

techniques, deciding 

instead to use digital 

processing to produce the 

first real-time 

processing 

computer -- the 

Whirlwind. This work is 

also well known for the 

development of core 

memory. 

Cores on a Matrix of Wires 

The basic concept for core 

memory had been patented 

by An Wang, Harvard 

University, it in 1949, but his 

technique involved using 

the cores on single wires 

to form delay lines. The 

Whirlwind Project 

conceived the technique of 

stringing the cores onto a 

matrix of wires and thus 

producing a random 

access memory. 





1953, In the midst of the first "police action" on the part of 

the United Nations in Korea, IBM took the opportunity to 

contribute to the war effort by providing a "Defense 

Calculator" that was in fact their first true entry into the 

computer business. The IBM "Type 701 EDPM" was built 

as a result of the conviction of T.J.Watson, Jr. that IBM 

had to take a step into this field and his convincing his 

father that computers would not immediately destroy the 

card processing business. The 700 series of 

machines, including the 704, 709, and eventually 

the 7090 and 7094, dominated the large mainframe 

market for the next decade, d and brought IBM from 

computer obscurity to first place in that same time period. 

IBM 650 (1953) 





Since the 1930s IBM had built a series of calculators in the 

600 series that t contributed t to the versatility of the 

card processing equipment that was their major product. 

The early IBM computers (701 and 702) were incompatible 

with the punched card processing equipment, but the IBM 

Type 650 EDPM (1954), a natural extension of the 

600 series, used the same card processing 

peripherals thus making it upwardly compatible for 

many existing IBM customers. A decimal, drum memory 

machine, the 650 was the first to be mass produced though 

IBM never expected to lease 1000 in the first after its 

announcement. For many universities it was to be their first 

computer, its attractiveness was considerably enhanced by 

the availability of a 60% educational discount conditional on 

the institution teaching certain computer-related t courses. 

1955 年 ,IBM704 投入市场 ; 在这台 

机 器中首次使用了变址寄存器 , 从 

而以一种更合理的方式实现了动态 

修改指令的地址部分所要完成的功 

能。 

并且在这台 机 器上首次出现了操作 

系 统 的原始模型 --- 控制程序。 





1956 年 ;Ferranti 有限公司建造 

成功第一台含通用寄存器的 机 器 

-----Pegasus; 

它有八个通用寄存器 , 其中 R0 恒 

为 “0”, 在今天的很多处理器中 , 

我们仍能看到这一特点。 

FORTRAN (1954) 

Following the example set 

by Grace Hopper, and a 

successful implementation 

of a digital code interpreter 

for the IBM 701 named 

Speedcoding, John 

Backus proposed the 

development of a 

programming language 

that would allow uses to 

express their problems in 

commonly understood 

d 

mathematical formulae -- 

later to be named 

FORTRAN. 





Bell Labs 

1940: Ohl develops the PN Junction 

1945: Shockley's laboratory established 

1947: Bardeen and Brattain create point contact 

transistor (U.S. Patent 2,524,035) 

Diagram from patent application 

Transistor(1947) 

William Shockley, John 

Bardeen, and Walter 

Brattain invent the 

"transfer resistance" 

device, later to be known 

as the transistor that will 

revolutionize the 

computer and give it the 

reliability that could not 

achieved with vacuum 

tubes. 

Point-contact-transistor 





Bell Labs 

Shockley’s sandwitch transistor 

1951: Shockley develops a junction transistor 

manufacturable in quantity (U.S. Patent 2,623,105) 






The Integrated Circuit 

Integrated Circuits 

1959: Jack Kilby, working at TI, dreams up the 

idea of a monolithic “integrated circuit” 

Components connected by hand-soldered 

wires and isolated by “shaping”, PN-diodes 

used as resistors (U.S. Patent 3,138,743) 


1961: TI and Fairchild introduce the first logic ICs ($50 

in quantity) 

1962: RCA develops the first MOS transistor 

Fairchild bipolar RTL Flip-Flop 

RCA 16-transistor MOSFET IC 





Field Effect Transistor (Lucent) 

1953 年 ,MIT 的林肯实验室研制成 

第一台晶体管 计 算 机 。从此 , 晶体 

管器件开始逐步代替电子管器件 , 

成为 计 算 机 实现的主要器件。 





• 1958~1964 

• Use of Transistor 

Second Generation 

• NCR and RCA were first -- Most notable IBM 

7000 Series 

• More complex ALU and Control Units 

• Use of higher h level l languages 

• System Software 

• I/O Channels 

为了进一步提高 IBM704 的性能 , 

1960 年 IBM 推出了 

世界上第一台通用流水线 机 器 

-----IBM7030 

它采用四级流水线 结 构 , 以使取 

指、译码和执行阶段重叠 , 从而 

提高速度。 





在 1960 年前后 ,IBM 公司推出了它的晶体管 计 算 机 

IBM 7094, 在这台 机 器中第一次采用逻辑指令来进行非 

数值 计 算 。 

该 机 器采用的许多成功的改进对后来 计 算 机 的发展 

有着很大的影响。 

指令 系 统 总共有 185 条指令。 

这些指令分为七类 : 

数据传送指令、定点 算 术指令、浮点 算 术指令、逻 

辑指令、变址指令、转移类指令和 I/O 指令。 

特点 : 

• 它有一 组 变址寄存器以及能够处理定、浮点 算 术运 算 的 

硬件 ; 

• 所有的 I/O 操作均由一台可对主存储器直接进行存取的 

I/O 处理 机 来控制 ; 

• 存储部分分成两个模块 , 一个模块只有偶地址单元 , 而 

另一模块则只有奇地址单元。这样在一个存储周期内 , 

可对独立的模块进行交叉存取 , 从而为 CPU 提供两个连续 

的字 ; 

• 它的指令中有三个特征位 , 用以指示是否需要变址 , 以 

及使用哪个变址寄存器 ; 





• 它采用了间接寻址技术。在这种技术中 , 间接寻址指令所形成的 

地址 , 不是存放操作数的地址 , 而是用来形成操作数地址的地址。 

这种寻址技术在分类、排序中是非常有用的 ; 

• 采用了专用的程序控制指令 , 这种指令对应于不同程序间的控 

制转移 , 如它的 LINK/TRA 指令对 ,LINK/TRA 指令对 , 即后来人们 

常称的调用子程序 / 子程序返回指令对 , 对调用子过程等是十分有 

效的 ; 

• I/O 处理 机 与 CPU 间的通讯采用了中断控制 , 并且在 I/O 处理 

机 中采用字的拆、装技术以使得 CPU 和 I/O 设备间的字长能够匹配 ; 

• 采用了 DMA 技术。即当 I/O 处理 机 请求访问主存储器时 , 可能使 

CPU 的主存访问请求延迟一个存储周期 , 但是并不中断 CPU 的操作 , 

只是使 CPU 操作推迟一个存储周期 ; 

IBM 7094 

• 700 series in 1952 last member of 7000 in 1964 

• Memory 2K to 32K of 36 bit words 

• Memory Cycle time fell from 30 micro sec to 1.4 

micro sec 

• Number of Opcodes grew from 24 to 185 

• Use of data channels 

• Multiplexor to which all channels are connected 





IBM 7090 Console 

1961 

The work on integrated circuits by Jack Kilby and 

Robert Noyce came to fruition in 1961 when the 

first commercially available integrated 

circuits became available from the Fairchild 

Corporation. The patent t for the silicon based IC 

had been granted to Robert Noyce, starting a long 

contention ti on patent t rights for IC's between the 

germanium version of Kilby and that of Noyce. 

From this date forward computers would 

incorporate ICs instead of individual transistors or 

other components. 





1961 

While operating systems (originally called monitors or 

supervisors) had been developed as a means of 

improving the throughput of computers in the late 1950s, 

the users were frustrated by their lack of intimacy with 

the computer. To solve this problem and 

return the control of the computer back in the hands of 

the user, Fernando Corbat MIT, produced CTSS 

(Compatible Time Sharing System) for the IBM 

7090/94, the first effective time-sharing system 

and coincidentally the first means of remote access to a 

computer since Stibitz' demonstration in 1940. 

从整体来说 , 这一时期的 机 器一般还 

大多采用简单的指令 系 统 , 通过变址寄存 

器来辅助完成对数 组 的访问。 机 器中只有 

极少量的寄存器 , 存储器空间也不大 , 而 

且处理器的性能和存储器的性能相近。程 

序设 计 一般采用汇编语言 , 在后期也使用 

一些早期出现的高级语言。 





The Earliest Instruction Sets 

Single Accumulator - A carry-over from the calculators. 

LOAD x AC ← M[x] 

STORE x M[x] ← (AC) 

ADD x AC ← (AC) + M[x] 

SUB 

x 

MUL x Involved a quotient register 

DIV 

x 

SHIFT LEFT 

SHIFT RIGHT 

AC ← 2 × (AC) 

JUMP x PC ← x 

JGE x if (AC) ≥ 0 then PC ← x 

LOAD ADR x AC ← Extract address field(M[x]) 

STORE ADR x 


Typically less than 2 dozen instructions! 


Programming: 

Single Accumulator Machine 

C i ← A i + B i , 1 ≤ i ≤ n 

A 

LOOP LOAD N 

JGE 

DONE 

ADD 

ONE 

STORE 

N 

F1 LOAD A 

F2 ADD B 

F3 STORE C 

JUMP 

LOOP 

DONE HLT 

How to modify the addresses A, B and C ? 


B 

C 

N -n 

ONE 1 

code 


Self-Modifying Code 

C ← A + B , 1 ≤ i ≤ n 

LOOP LOAD N 

i i i 

JGE 

ADD 

STORE 

F1 LOAD A 

F2 ADD B 

F3 STORE C 

LOAD JUMP ADR 

DONE ADD HLT 

STORE ADR 

modify the 

LOAD ADR 

program 

ADD 

for the next 

STORE ADR 

iteration 

LOAD ADR 

ADD 

STORE ADR 

JUMP 

DONE HLT 


DONE 

ONE 

N 

F1 LOOP 

ONE 

F1 

F2 

ONE 

F2 

F3 

ONE 

F3 

LOOP 

Each iteration involves 

total bookkeeping 

instruction 

ti 

fetches 17 14 

operand 

fetches 

stores 

10 

8 

5 4 


Index Registers 

Tom Kilburn, Manchester University, it mid 50’s 

One or more specialized registers to simplify 

address calculation 

Modify existing instructions 

LOAD x, IX AC ← M[x + (IX)] 

ADD x, IX AC ← (AC) + M[x + (IX)] 

... 

Add new instructions to manipulate index registers 

JZi x, IX if (IX)=0 then PC ← x 

else IX ← (IX) + 1 

LOADi x, IX IX ← M[x] (truncated to fit IX) 

... 


Index registers have accumulator-like 

characteristics 


Using Index Registers 

C i ← A i + B i , 1 ≤ i ≤ n 

LOADi -n, IX 

LOOP JZi DONE, IX 

A 

LOAD 

LASTA, IX 

ADD LASTB, IX 

STORE LASTC, IX 

JUMP 

LOOP 

LASTA 

DONE HALT 

• Program does not modify itself 

• Efficiency i has improved dramatically (ops / iter) 

with index regs without index regs 

instruction fetch 5(2) 

17 (14) 

operand fetch 2 

10 (8) 

store 1 

5 (4) 

• Costs: 

Instructions are 1 to 2 bits longer 

Index registers with ALU-like circuitry 

Complex control 



Operations on Index Registers 

To increment index register by k 

AC ← (IX) 

AC ← (AC) + k 

IX ← (AC) 

new instruction 

new instruction 

also the AC must be saved and restored. 

It may be better to increment IX directly 

INCi k, IX IX ← (IX) + k 

More instructions to manipulate index register 

STOREi x, IX M[x] ← (IX) (extended to fit a word) 

... 

IX begins to look like an accumulator 

⇒ several index registers 

several accumulators 

⇒ General Purpose Registers 



Evolution of Addressing Modes 

1. Single accumulator, absolute address 

LOAD 

x 

2. Single accumulator, index registers 

LOAD x, IX 

3. Indirection 

LOAD (x) 

4. Multiple accumulators, index registers, indirection 

LOAD 

R, IX, x 

or LOAD R, IX, (x) the meaning? 

R ← M[M[x] + (IX)] 

or R ← M[M[x + (IX)]] 

5. Indirect through registers 

LOAD R I , (R J ) 

6. The works 

LOAD R I , R J , (R K ) R J = index, R K = base addr 

Variety of Instruction Formats 

Two address formats: the destination is same as one of the operand 

sources 

(Reg × Reg) to Reg R I ← (R I ) + (R J ) 

(Reg × Mem) to Reg R I ← (R I ) + M[x] 

x can be specified directly or via a register 

effective address calculation for x could include indexing, 

indirection, ... 

Three address formats: One destination and up to two operand 

sources per instruction 

(Reg x Reg) to Reg R I ← (R J ) + (R K ) 

(Reg x Mem) to Reg 

R I ← (R J ) + M[x] 





More Instruction Formats 

Zero address formats: operands on a stack 

add 

load 

M[sp-1] ← M[sp] + M[sp-1] 

M[sp] ← M[M[sp]] 

Register 

SP 

Stack can be in registers or in memory (usually top of stack 

cached in registers) 

One address formats: Accumulator machines 

Accumulator is always other implicit operand 

A 

B 

C 

Many different formats are possible! 

Data Formats and Memory Addresses 

Data formats: 

Bytes, Half words, words and double words 

Some issues 

• Byte addressing 

g 

Most Significant 

Byte 

Big Endian 0 1 2 3 

vs. Little Endian 3 2 1 0 

• Word alignment 

Suppose the memory is organized in 32-bit words. 

Can a word address begin only at 0, 4, 8, .... ? 

Least Significant 

Byte 

Byte Addresses 

0 1 2 3 4 5 6 7 





Software Developments 

Compatibility Problem at IBM 

up to 1955 Libraries of numerical routines 

- Floating point operations 

- Transcendental functions 

- Matrix manipulation, equation solvers, . . . 

1955-60 High level Languages - Fortran 1956 

Operating Systems - 

- Assemblers, Loaders, Linkers, Compilers 

- Accounting programs to keep track of 

usage and charges 

Machines required experienced operators 

⇒ 

⇒ 


Most users could not be expected to understand 

d 

these programs, much less write them 

Machines had to be sold with a lot of resident 

software 


 

By early 60’s, IBM had 4 incompatible lines of 

computers! 

701 → 7094 

650 → 7074 

702 → 7080 

1401 → 7010 

Each system had its own 

• Instruction set 

• I/O system and Secondary Storage: 

magnetic tapes, drums and disks 

• assemblers, compilers, libraries,... 

• market niche 

business, scientific, real time, ... 


⇒ IBM 360 


Third Generation 

• Use of Integrated Circuits 

• Examples IBM System/360 and DEC PDP-8 

• IC technology has continued to play a major role in this 

field 

• Family concept 

•Similar or identical instruction set 

•Similar il or identical operating system 

•Increasing speed 

•Increasing number of I/O ports 

•Increasing memory size 

•Increasing cost 

计 算 机 系 统 

软、硬件的融合 与 权衡 





1959 年 ,Barton 提出了堆栈 计 算 机 的 

设想 , 在此基础上 ,1963 年 Burroughs 公司 

推出了第一台堆栈 计 算 机 B5000, 它可以 

认为是第一台在认真考虑软硬件权衡问题 

的基础上设 计 的 机 器。这台 机 器的设 计 主 

要是考虑如何高效地支持象 ALGOL 这样的高 

级语言 , 同时这台 机 器使用了高级语言编 

写的操作 系 统 MCP。 

B5000 的主要特点是 : 算 术寄存器由后进先出 

的下推堆栈的方式 构 成 , 栈顶的两个字是 CPU 

中的快速寄存器 , 而栈的其它部分在主存储 

器中 , 在大多数情况下指令均采用栈顶的内 

容作为操作数 , 而 计 算 结 果也送回堆栈 , 因 

此指令中不需指明操作数的地址 , 所以 , 这 

种 机 器又称为 “ 零地址指令 ” 机 器 ; 使用一 

特征位来区分操作数及标识符 , 这样就可以 

用来标识信息的类型。 

在绝大多数高级语言中 , 类型说明是必不可少的 , 加特征位意味着在 机 器的指令 

系 统 中不必再为不同的数据类型提供不同的指令 ,CPU 仅需检查特征位就可以确 

定数据类型 , 这样就为 机 器发现软件中的类型错误提供了可能。 





A Stack Machine 

Evaluation of Expressions 

Processor 

stack 

: 

a 

push b 

 


Main 

Store 

b 

a 

A Stack machine has a stack as a 

part of the processor state 

typical operations: 

push, pop, +, *, ... 

Instructions like + implicitly 

specify the top 2 elements of the 

stack as operands. 

push c 

 

c 

b 

a 

pop 

 

b 

a 


(a + b * c) / (a + d * c - e) 

a 

+ - 

b 

/ 

* + 

c 

a 

Reverse Polish 

a b c * + a d c * + e - / 


d 

* 

push push multiply a b c 

e 

c 

* 

c 

b b* c 

a 

Evaluation Stack 


Evaluation of Expressions 

Hardware organization of the stack 

(a + b * c) / (a + d * c - e) 

/ 

Stack k is part of the processor state 

t 

⇒ stack must be bounded and small 

≈ number of Registers, 

not the size of main memory 

a 

+ - 

b 

* + 

c 

a 

* 

e 

Conceptually stack is unbounded 

⇒ a part of the stack is included in the 

processor state; the rest is kept in the 

main memory 

Reverse Polish 

a b c * + a d c * + e - / 


d 

add 

c 

+ 

b * c 

a + ab * c 

Evaluation Stack 




Stack Operations and 

Implicit Memory References 

Suppose the top 2 elements of the stack are kept in registers and the 

rest is kept in the memory. 

Each push operation⇒ 1 memory reference 

pop operation ⇒ 1 memory reference 

No Good! 

Better performance can be got if the top N elements are kept in 

registers and memory references are made only when register stack 

overflows or underflows. 


Issue - when to Load/Unload registers ? 


Stack Size and Memory References 

a b c * + a d c * + e - / 

program stack (size = 2) memory refs 

push a R0 a 

push b R0 R1 b 

push c R0 R1 R2 c, ss(a) 

* R0 R1 sf(a) 

+ R0 

push a R0 R1 a 

push d R0 R1 R2 d, ss(a+b*c) 

push c R0 R1 R2 R3 c, ss(a) 

* R0 R1 R2 sf(a) 

+ R0 R1 sf(a+b*c) 

push e R0 R1 R2 e,ss(a+b*c) 

- R0 R1 sf(a+b*c) 

/ R0 

4 stores, 4 fetches (implicit) 



Stack Size and Expression Evaluation 

Register Usage in a GPR Machine 

a and c are 

“loaded” twice 

⇒ 

not the best 

use of registers! 

a b c * + a d c * + e - / 

program stack (size = 4) 

push a R0 

push b R0 R1 

push c R0 R1 R2 

* R0 R1 

+ R0 

push a R0 R1 

push d 

R0 R1 R2 

push c R0 R1 R2 R3 

* R0 R1 R2 

+ R0 R1 

push e R0 R1 R2 

- R0 R1 

/ R0 

(a + b * c) / (a + d * c - e) 

Load R0 a 

More control over register usage 

since registers can be named 

Load R1 c 

explicitly 

Load R2 b 

Reuse 

R2 Mul R2 R1 

Load Ri m 

Add R2 R0 

Load Ri (Rj) 

Reuse Load R3 d 

Load Ri (Rj) (Rk) 

R3 Mul R3 R1 

Add R3 R0 

⇒ 

Reuse Load R0 e 

- eliminates unnecessary 

R0 Sub 

Div 

R3 

R2 

R0 

R3 

Loads and Stores 

- fewer Registers 

but instructions may be longer! 





Stack Machines: Essential features 

In addition to push, pop, + etc., the 

instruction set must provide the 

capability to 

hi t 

refer to any element in the 

data area 

jump to any instruction in 

the code area 

move any element in the 

stack frame to the top 

machinery to 

carry out 

+, -, etc. ⇔ 

SP 

stack 

DP 

a 

push a 

b 

PC push b 

c 

push c . 

* 

+ 

push e 

data 

/ 

code 

堆栈式 结 构 在六十年代非常流行 , 它是 

从 机 器设 计 角度考虑对高级语言支持的一种 

非常有益的尝试 , 它对提高代码的密度是非 

常有益的 , 但是这种 结 构 也有许多重要缺陷。 

实践表明 机 器的高性能在很大程度上是通过 

适量快速寄存器 , 而不是堆栈 结 构 , 来获得 

的。堆栈式 结 构 受限较多 , 而且需要大量的 

交换和复制操作 ; 只用快速寄存器实现栈顶 , 

当信息存放在慢速存储器中时 , 会使性能产 

生损失等。 





计 算 机 的应用领域不断扩大 , 同时 , 

伴随着软件资源的不断积累 , 软件兼容问 

题显得越来越重要 , 为了有效地解决这一 

问题 ,1964 年 ,IBM 公司宣布了 IBM 360 系 

列。这个 系 列包含六种型号 , 它们之间的 

性能可相差 25 倍。Amdahl 和 Blaauw 等人在 

介绍 IBM360 时 , 提出了 “ 系 统 结 构 ” 这一 

重要概念 , 并将此术语解释为程序员所看 

到的那部分指令 系 统 。他们认为具有相同 

结 构 的 机 器将能够运行相同的软件。 

IBM 360 : Design Premises 

Amdahl, Blaauw and Brooks, 1964 

The design must lend itself to growth and successor machines 

General method for connecting I/O devices 

Total performance - answers per month rather than bits per 

microsecond ⇒ programming aids 

Machine must be capable of supervising itself without manual 

intervention 

Built-in hardware fault checking and locating aids to reduce 

down time 

Simple to assemble systems with redundant d I/O devices, 

memories etc. for fault tolerance 

Some problems required floating point words larger than 36 bits 





IBM 360 

IBM 360: A General-Purpose Register (GPR) Machine 

Processor State 

16 General-Purpose 32-bit Registers 

may be used as index and base register 

Register 0 has some special properties 

4 Floating Point t64bit 64-bit Registers 

A Program Status Word (PSW) 

PC, C Condition codes, Control flags 

A 32-bit machine with 24-bit addresses 

But no instruction contains a 24-bit address! 

Data Formats 

8-bit bytes, 16-bit half-words, 32-bit words, 64-bit double- 

words The IBM 360 is why bytes are 8-bits long today! 





IBM 360: Initial Implementations 

Model 30 . . . Model 70 

Storage 8K - 64 KB 256K - 512 KB 

Datapath 8-bit 64-bit 

Circuit it Delay 30 nsec/level l 5 nsec/level 

l 

Local Store Main Store Transistor Registers 

Control Store Read only 1μsec 

Conventional circuits 

IBM 360 instruction set architecture (ISA) completely hid 

the underlying technological differences between various 

models. 

Milestone: The first true ISA designed as portable 

hardware-software interface! 


With minor modifications it still survives today! 


IBM 360 系 列 机 器成功地在 IBM 内部解决了软件 

要求环境稳定 与 器件、硬件技术迅速发展之间的矛 

盾。在 IBM 360 的 CPU 中使用了 16 个通用寄存器以存 

放操作数和运 算 结 果 , 并且可以做变址寄存器。 

IBM 360 能够支持大量不同的数据类型 , 如它的 

加法就有长定点、短定点、 组 合式十进制、长浮点 

标准化、长浮点非标准化、短浮点标准化和短浮点 

非标准化等 9 种指令 , 因而共有近 200 条指令 , 这些 

指令由 2 个、4 个或 6 个字节 组 成 , 并分成五种不同格 

式 : 寄存器 - 寄存器型 (RR)、寄存器 - 变址型 (RX)、 

寄存器 - 存储器型 (RS)、存储器 - 立即数型 (RI) 和存 

储器 - 存储器型 (SS)。其中 SS 型指令都是十进制或串 

指令。 



Stack versus GPR Organization 

Amdahl, Blaauw and Brooks, 1964 

1. The performance advantage of push down stack 

organization is derived from the presence of fast 

registers and not the way they are used. 

2. Advantage of instruction density because of implicit 

addresses is equaled if short addresses to specify 

registers are allowed. 

3. Management of finite depth stack causes 

complexity. 

4. Recursive subroutine advantage can be realized 

only with the help of an independent stack for 

addressing. 



Stack Machines (Mostly) Died by 1980 

1. Stack programs are not smaller if short (Register) 

addresses are permitted. 

2. Modern compilers can manage fast register space 

better than the stack discipline. 

GPR’s and caches are better than stack and displays 

Early language-directed architectures often did not 

take into account the role of compilers! 

B5000, B6700, HP 3000, ICL 2900, Symbolics 3600 

Some would claim that an echo of this mistake is 

visible in the SPARC architecture register 

windows - more later… 



Stacks post-1980 

• Inmos Transputers (1985-2000) 

Designed to support many parallel processes in Occam language 

Fixed-height stack design simplified implementation 

Stack trashed on context swap (fast context switches) 

Inmos T800 was world’s fastest microprocessor in late 80’s 

• Forth machines 

Direct support for Forth execution in small embedded real-time 

environments 

Several manufacturers (Rockwell, Patriot Scientific) 

• Java Virtual Machine 

Designed for software emulation, not direct hardware execution 

Sun PicoJava implementation + others 

• Intel x87 floating-point unit 

Severely broken stack model for FP arithmetic 

Deprecated in Pentium-4, replaced with SSE2 FP registers 



1953 年 ,Wilkes 提出了微程序控制的基本思 

想和特点。微程序有许多优点 , 如易于改变设 计 ; 

通过仿真 (emulation) 其它指令 系 统 , 可以保证 

软件兼容 ; 微程序设 计 可以减少实现复杂指令的 

成本等等。但是 , 由于在很长的一段时间内 , 用 

于实现控制存储器的技术和主存的是相同的 , 而 

且 机 器的指令 系 统 也比较简单 , 因而微程序设 计 

的优势并不明显。但是 , 当控制存储器采用半导 

体存储器工艺 , 主存储器采用磁芯技术时 , 这两 

种工艺的速度相差十倍 , 从而为微程序的广泛使 

用提供了基础。IBM360 系 列的许多 机 器都采用了 

微程序技术。 



为了向用户提供低价格的 机 器 , 

1965 年 DEC 公司推出了第一台大规模 

销售的商用小型 机 -----PDP-8。在此 

之后 , 他们又推出了 PDP-11 等 机 种。 

小型 机 的出现对 计 算 机 的普及有着重 

要的意义。 

DEC PDP-8 (1965) 





DEC PDP-8 (1965) 

DEC PDP-11 

A Typical PDP-11 Installation Digital’s video terminals were relatively inexpensive, and many Digital customers took 

advantage by connecting as many users as possible to their Digital computers. The availability of video-based 

applications like word processing and spreadsheet programs brought millions of new users into the world of computing. 

With just a little training, people who knew nothing at all about computers could sit down at a terminal and do productive 

work. 


Word length: 12 bits 




为了向用户提供高速的科学 计 算 机 

器 ,1964 年 CDC 公司推出了第一台超级 

计 算 机 :CDC 6600。这台 机 器为达到 

其设 计 要求 , 采用了深度流水线技术。 

当时 , 它的设 计 师 Thornton 和 Cray 等 

人已经认识到 : 简单 结 构 可为设 计 高 

效流水线提供更好地支持 , 另外 , 多 

个功能部件可用于进一步开发指令间 

的空间并行性。 

CDC 6600 





C 

D 

C 

CDC 6600 

logic gates 

6 

6 

0 

0 

操 

作 

员 

控 

制 

台 





CDC 6600 Cordwood module 

CDC 6600 1Kbit core plane 





C 

D 

C 

6 

6 

0 

0 

结 

构 

简 

图 

CDC 6600 

Fastest computer 10/64-69 till 7600 intro 

Packaging for 400,000 000 transistors 

Memory 128 K 60-bit words; 2 M words ECS 

100 ns. (4 phase clock); 1,000 ns. cycle 

Functional l Parallelism: li I/O adapters, 

I/O channels, Peripheral Processing Units, Load/store units, 

memory, function units, ECS- Extended Core Storage 

10 PPUs and introduced multi-threading 

10 Functional units control by scoreboard 

8 word instruction stack 



No paging/segmentation… base & bounds 



CDC 6600 机 器和同时期的其它 机 

器相比 , 指令 系 统 要简单得多 ; 另外 , 

指令 系 统 中只有寄存器 - 装入和寄存 

器 - 存放指令以访问存储器 , 即采用 

了所谓的 load/store 结 构 。整个处理 

器都用硬连线实现 , 而且为了减少访 

问低速存储器而产生的损失 , 使用了 

较大的指令缓冲器 , 从而保证了流水 

线的高效运行。 

1965 年 ,Wilkes 在他的一篇论文 

中提出了直接映象 Cache 的思想。 

1970 年 ,IBM 公司推出了 IBM 

360/85 机 型 , 这种 机 器是第一台使用 

Cache 的商品 计 算 机 。从此 ,Cache 作 

为一种可以有效解决 计 算 机 处理和存 

储之间速度差异的技术 , 在后来的 机 

器中扮演着十分重要的角色。 





五、六十年代 , 是 计 算 机 世界蓬勃发展、百 

花齐放的时期 , 今天 计 算 机 系 统 中的绝大多数关 

键技术和 结 构 都是在这个时期就出现了的。六十 

年代末 , 高级语言已有了很大发展 , 如 Fortran、 

IPL、Lisp、Cobol、PL/I 和 Algol 等语言都已出现 , 

并引起人们重视。另外 , 算 法、 计 算 理论、 系 统 

优化、信息处理、CAD(Computer Aided Design) 

等许多领域都开始受到了人们重视。生产工艺的 

迅速发展 , 特别是半导体技术和集成电路的出现 , 

使人们有条件实现更复杂的 计 算 机 系 统 , 这是产 

生这种局面的一个重要原因 ; 另外 , 计 算 机 应用 

领域的不断扩大 , 对 计 算 机 的功能要求不断提高 , 

也是 计 算 机 发展的一个不可忽视的动力。 



•Semiconductor memories 

•64 MB per chip 

•Microprocessors 

•Instruction set > 150 

•Address bus width 32 

•Data D t Bus width 32 

Fourth Generation 

•Memory addressability 4GB 

•Bus bandwidth 32MB/sec 

•Cache architectures 



计 算 机 普及 

高级语言 机 器的尝试 

七十年代 , 当集成电路工业发展 

到 LSI(Large scaled Integrated 

circuit) 阶段时 , 它的门密度可达到 

1000 门 / 片 , 这时已有可能利用单片 IC 

制成简单的 CPU, 即微处理器。1971 年 , 

Intel 公司开始出售它的第一种微处理 

器芯片 Intel 4004;1973 年 , 又推出 

Intel 8008 芯片。这些 CPU 都采用了基 

于累加器的 结 构 。 





1976 年 , Cray-1 

第一台每秒亿次浮点 计 算 能力的 计 算 机 

第一台商业化的向量超级 计 算 机 

在当时 , 既是速度最快的 计 算 机 , 也是对 

科学 计 算 程序 , 性能价格比最好的 计 算 机 

1996 年 , Cray Research 

被 Silicon Graphics 兼并 

CRAY-1 

1976 





Cray X-MP(1985) 

CRAY X-MP with 4 processors achieved a processing speed of 713MFLOPS (against a peak of 840) on 

1000x1000 LINPACK. In thirty years the supercomputer had achieved an improvement of five orders 

of magnitude (from 5KFLOPS for the 1955 IBM STRETCH). 

Cray 

XMP 

4 

vector Proc. 





Cray 2 

1985 

Is vector processor dead? 

Ratio of Vector processor to 

Microprocessor speed vs time 

1993 Cray Y-MP IBM RS6000/550 94 9.4 

1997 NEC SX-4 SGI R10k 902 9.02 

2000* Fujitsu VPP Intel Merced 900 9.00 





如何减小高级语言和 机 器硬件之间的语 

义差距 (semantic gap)? 

由于微电子工业的发展 , 硬件生产的成 

本迅速降低 , 同时 , 也为我们实现更复杂的 

机 器 结 构 提供了基础 , 因而 , 当时一种普遍 

的观点是用硬件来不断实现高级语言、编译 

程序和操作 系 统 的功能 , 从而消除这种语义 

差异 , 降低软件的成本。受这种认识的影响 , 

这个时期的许多 机 器大都力图在 机 器的硬件 

上 , 直接对高级语言及编译等提供支持。 

1978 年 DEC 公司推出了 VAX-11/780 小型 机 (Virtual 

Address eXtension of PDP-11)。 

设 计 的一个重要动 机 就是减化高级语言的编译器 

设 计 。VAX 的 系 统 结 构 就设 计 了具有高度的规整性 

的指令 系 统 , 使高级语言的语句和单一的 VAX 指令 

之间有良好的映射关 系 。另外 , 由于编译后的程 

序常常得不到需要的存储空间 , 所以 ,VAX 的设 计 

师很注意优化代码的大小。VAX-11/780 是第一台 

真正采用存储器 - 存储器 结 构 的 机 器。VAX11/780 

机 器在商业上取得了巨大的成功 , 这里的主要原 

因是该 机 器将当时大型 机 的许多成功概念和较低 

成本的工艺很好地 结 合在一起 , 另外 ,VAX11 机 器 

在很大程度上 , 保证了和 PDP11 机 器的兼容。 





VAX 11/780 的产生代表着超级小型 

机 的出现。它的成功进一步推进了小型 

机 的发展。 

Software: FORTRAN-77, 

COBOL, BLISS-32, VAX 

VMS Version 1 

Price: $120,000 000 to $160,000 

000 

高级语言 计 算 机 结 构 

(High Level Language Computer Architecture) 

这种 结 构 希望通过采用高级语言作为 机 器语 

言 , 从而完全消除语义差异。这种研究中 , 

最有名的、规模最大的是 SYMBOL 计 划。1971 

年 ,Smith、Rice 等人介绍了他们在 Fairchid 

公司开展的 SYMBOL 计 划。他们的研究目的是 

希望建造一台能够大量减少编程时间的高级 

语言分时 机 器。 





在 SYMBOL 实验样 机 中 , 用硬件实 

现了编程语言、操作 系 统 , 甚至正文 

编辑器等许多通常用软件完成的功能 , 

所以整个 系 统 非常复杂 , 这给设 计 和 

调试都带来了很大的困难。另外 , 程 

序员只能使用 机 器支持的那种高级语 

言 , 这样就不可能吸取高级语言和操 

作 系 统 的最新成就 , 使得 系 统 的灵活 

性很差。 

由于 , 在这种 机 器中极少发生的 

复杂事件也需要完全由硬件来处理 , 

所以 , 虽然对一些异乎寻常的事件 , 

机 器处理速度很快 , 但 SYMBOL 样 机 在 

处理简单的、经常出现的事件时 , 往 

往速度较慢 ; 这样 , 机 器的整体性能 

和预想的 结 果相差很远。 





在七十年代末 , 计 算 机 实现技术的发 

展 结 果是 : 半导体存储器开始替代磁芯存 

储器 ; 集成电路变得越来越便宜 ; 而且 , 

和磁芯存储器相比 , 集成电路的速度能够 

比它快 10 倍左右。从 结 构 和 组 成上来看 , 

Cache 的出现和发展有效地改进了非微码程 

序的执行速度。同时 , 编译技术的发展也 

非常快 , 人们开始认识到优化编译产生的 

目标代码往往只使用指令 系 统 中的少数一 

些指令。 

计 算 机 设 计 的工程化 





在许多人试图用堆栈 结 构 机 器 , 或者用 

硬件逐步取代软件以减小语义差异的同时 , 

有些研究人员对指令 系 统 的使用情况、高级 

语言的使用特点 , 以及如何真正从性能的角 

度来对硬件、软件进行权衡等问题进行了大 

量细致的研究 , 从而 , 开创了 计 算 机 设 计 工 

程化的新局面。 



早在五十年代末 ,Gibson 就对 IBM7090 机 器 

的指令的使用分布情况进行了研究。但由于当 

时采集数据的技术还不成熟 , 设备非常昂贵 , 

所以只能对一些小程序进行研究。这样所得 结 

论就不很有说服力。在七十年代末 , 由于实验 

条件的不断完善 , 以及 计 算 机 发展的需要 , 对 

不同 机 器的指令 系 统 的测试、分析变得非常活 

跃 , 这为我们更合理地设 计 机 器提供了重要依 

据。另外 , 在七十年代 , 人们对高级语言的使 

用特点也进行了大量研究。虽然 , 这一时期的 

大部分工作仅针对程序的静态特性 , 如代码大 

小、程序中各指令的使用频度等 , 但当时对高 

级语言程序的动态执行特征的研究也已开始引 

起人们的重视。 



在八十年代初 ,Ditzel 和 Patterson 分析 

了高级语言 机 器 结 构 所遇到的一些困难的原 

因 , 在此基础上提出了简单的 机 器 结 构 更有 

可能获得高性能的观点。1980 年 ,Patterson 

等人提出了、并讨论了 RISC(Reduced 

Instruction ti Set Computer) 的思想。同时期 

的其它一些研究人员也开始提倡体 系 结 构 应 

该和编译技术在提高 系 统 整体性能的基础上 

紧密 结 合 , 而不是仅仅在形式上注意 结 构 对 

编译程序的支持。 

从 1975 年开始 ,John Cocke 在 IBM 公司开 

始了一个称为 801 的 计 划 , 他们的最初研究目 

标是 : 如何设 计 比现有 机 器性能价格比更好 

的、支持高级语言的 机 器。在他们的工作中 

充分借鉴了象 CDC 6600 中采用的硬连线控制 

这样的设 计 简单化原则。虽然 801 只是一个实 

验性的 计 划 , 但是他们为 RISC 技术的发展做 

出了许多基础性的贡献。为此 Cocke 荣获了 计 

算 机 领域的最高奖 -----Eckert-Maunchly 奖 

和 Turing 奖。 





1980 年 , 加州大学 Berkeley 分校的 David 

Patterson 开始设 计 具有 RISC 思想的 机 器。 

他们先后实现了试验样 机 RISCI 和 RISCII, 

成为后来得到广泛应用的 

SPARC(Scalable l Processor ARChitecture) 

t 结 构 的稚型 

1981 年 ,Stanford 大学的 John 

Hennessy 和他的同事们设 计 、实现了 

MIPS(Microprocessor without 

Interlocked Pipeline Stages) 机 器。 

MIPS 原始设 计 的两个最重要的特色是 

高效的指令流水线和编译辅助的流水 

线调度策略 , 为后来商品化的 R2000, 

R3000 等奠定了基础。 





以上三个小 组 设 计 的 机 器 801、 

MIPS 和 RISC II 在许多方面是不谋 

而合的 , 例如采用简单的 

LOAD/STORE 结 构 、固定的 32 位指 

令格式 , 以及强调流水线的高效 

性等等。 

八十年代中期 ,RISC 思想和技术 

开始普遍被工业界接受。RISC 技 

术本身也得到了迅速完善和发展。 

1986 年 , 出现了一些商品化的 

RISC 芯片 , 如整数处理器 MIPS 

2000;1987 年 ,Sun 公司开始提 

供采用 SPARC 结 构 的 机 器。 





八十年代末 , 人们开始在注重流水线 

技术 , 以产生时间并行效益的同时 , 也力 

图进一步开发出指令间空间并行的效益。 

1989 年 ,Intel 公司推出了采用 LIW 结 构 

(Long Instruction Word) 的 RISC 处理器 

芯片 -----i860。1990 年 ,IBM 公司推出了 

第一种采用超级标量 结 构 (Superscalar) 

的新一代 RISC 计 算 机 系 统 -----RISC/6000。 

1991 年 2 月 ,MIPS 公司宣布了采用超级流 

水线 结 构 的 RISC 处理器 -----R4000。 

MIPS R4400 Microprocessor 





80X86 系 列 

单处理器 系 统 小 结 

° 以史为鉴 , 可知兴替 , 可明得失 ! 

8080 

8086 80286 80386 

29k trans 

134k trans 

275k trans 

° 起源 

• 大型 计 算 机 

• Von Neumann 曾认为整个美国最多需要 10 台 计 算 机 

• 为当今的 计 算 机 体 系 结 构 作了大量的储备 

1200k trans 

80486 


3100k trans 

Pentium 

PentiumPro 

P 

5500k trans 


° 微程序 ( 微码 ) 至关重要 

• IBM 360 – VAX 

• CPU 采用多个逻辑电路板实现 

• 通过 “ 微程序执行 机 制 (microengine)” 以解释方式实现指令 

系 统 

• 易于增添 ( 许多 ) 新功能 

• 性能评测没有 统 一标准 ( 专用平台 ) 



单处理器 系 统 小 结 ( 续 ) 

°RISC Revolution 

• ~1983, IBM 801, UCB RISC project, Stanford MIPS project 

• Make the microengine be the CPU! 

- Avoid inefficiency of interpretation layer 

- Let compilers do the optimizing 

- Implement on single chip 

• Generic Unix Box 

°Superscalar p Processing 

• ~1990 (IBM Power-1) to present (almost all processors today) 

• Basic idea: issue multiple instructions simultaneously 

- exploit fine-grained parallelism within the instruction stream 

• In-order (Alpha 21164) vs. out-of-order (MIPS R10K, Pentium Pro) 

• Aggressive, pipelined cache and memory subsystems 



最新进展 

°How to push Superscalar further? 

• Hardware complexity (rather than chip real estate) is the limitation 

• One direction: VLIW (Intel “EPIC” instruction set in IA-64) 

°Parallel processing 

• supercomputers -> computer servers -> desktop 

°Personal computers remain a key driving force 

• Huge economies of scale 

°Customers t want more than raw computing power 

• Fast WWW access, multimedia (3D graphics, video, etc.) 

- Difficult real-time performance constraints 

- ISA extensions (e.g., Intel MMX) + balanced system-level design 

°Mobile Computing 

• Low power consumption is important 



IA-32 

Control 

Itanium Processor Silicon 

FPU 

IA-64 Control 

TLB 

Integer Units Cache 

Instr. 

Fetch & 

Decode Cache Bus 

Core Processor Die 


4 x 1MB L3 cache 


Frequency 

Transistor Count 

Process 

Package 

Itanium Machine Characteristics 

800 MHz 

25.4M CPU; 295M L3 

0.18u CMOS, 6 metal layer 

Organic Land Grid Array 

Machine Width 

6 insts/clock (4 ALU/MM, 2 Ld/St, 2 FP, 3 Br) 

Registers 

Speculation 

Branch Prediction 

FP Compute Bandwidth 

Memory -> >FPB Bandwidth 

Virtual Memory Support 

L2/L1 Cache 

L2/L1 Latency 

L3 Cache 

System Bus 


14 ported 128 GR & 128 FR; 64 Predicates 

32 entry ALAT, Exception Deferral 

Multilevel 4-stage Prediction Hierarchy 

3.2 GFlops (DP/EP); 6.4 GFlops (SP) 

4 DP (8 SP) operands/clock 

64 entry ITLB, 32/96 2-level DTLB, VHPT 

Dual ported 96K Unified & 16KD; 16KI 

6 / 2 clocks 

4MB, 4-way s.a., BW of 12.8 GB/sec; 

2.1 GB/sec; 4-way Glueless MP 

Scalable to large (512+ proc) systems 


同 构 CMP—IBM POWER4 

IBM POWER4 :Server Multi-chip Module 





POWER4 Chip I/O Footprint 

A Closer Look at AMD’s New Generation 

Server and Desktop Architecture 

True quad core die 

Optimized for 65nm SOI 

and beyond 

Expandable shared 

L3 cache 

IBM CMOS 0.18um 

copper and SOI with 7M 

IPC enhanced 

CPU cores 

• 32B instruction fetch 

• Enhanced branch prediction 

• Out-of-order load execution 

• Up to 4 DP FLOPS/cycle 

• Dual 128-bit SSE dataflow 

• Dual 128-bit loads per cycle 

• Bit Manipulation extensions (LZCNT/POPCNT) 

• SSE extensions (EXTRQ/INSERTQ, MOVNTSD/MOVNTSS) 

Enhanced Direct 

Connect Architecture 

and Northbridge 

• HT-3 3links (Up to 52GT/ 5.2GT/sec) 

• Enhanced crossbar 

• DDR2 with migration path to 

DDR3 

• FBDIMM when appropriate 

• Enhanced power management 

• Enhanced RAS 

2000.1 





13.75mm * 22 mm 


Intel 80 核芯片 

•80 个处理核心 

• 1T 

Teraflop 

• 100 亿次运 算 / 瓦特 

• 主频 3.1GHz 

• 面积 300mm², 

• 各 CPU 内核 与 内存 1 对 1 地 

连接 , 分别拥有 256MBps 

的内存带宽 

• 32MB 的片上静态 RAM 。 

• 单芯片整体的内存带宽达 

到了 1TB/s 


Thinking Machine CM-2(1987): 65,536 1-bit 

processors, SIMD 



CM-5(1991), 16384 SPARC 

KSR(COMA) 





IBM SP-1 

IBM SP-2(1993): RS/6000 Model 590 processor 

board, AIX OS, MPP Switch, Max. 128 nodes 





Intel Paragon(1992): 4-2048 i860 

SGI 

PowerChallenge 

Family 





Cray T3D 

Origin 2000 





指令 系 统 的演变 

Single Accumulator (EDSAC 1950) 

Accumulator + Index Registers 

(Manchester Mark I, IBM 700 series 1953) 

Separation of Programming Model 

from Implementation 

High-level Language Based 

Concept of a Family 

(B5000 1963) (IBM 360 1964) 

General Purpose Register Machines 

Complex Instruction Sets 

Load/Store Architecture 

(Vax, Intel 432 1977-80) (CDC 6600, Cray 1 1963-76) 

Growth of Microprocessor Performance 

Perfo 

orman nce in 

Mflo op/s 

10000 

1000 

100 

10 

1 

0.1 

0.01 

8087 

Cray 1S 

Cray 2 

Cray Y-MP 

Cray C90 Cray T90 

Cray X-MP 

R2000 

i860 

Alpha RS6000/590Alpha 

RS6000/540 

Supers 

Micros 

2X transistors/Chip Every 1.5 

years 

“Moore’s Law” 

80387 Microprocessors have 

6881 

80287 become smaller, denser, and 

more powerful. 


RISC 

(Mips,Sparc,HP-PA,IBM PA RS6000, . . .1987) 



Year 


Sony Playstation 2000 

人人都是亿万富翁 

• Emotion Engine: 6.2 GFLOPS, 75 million polygons per second 

(Microprocessor Report, 13:5) 

– Superscalar MIPS core + vector coprocessor + graphics/DRAM 

– Claim: Toy Story realism brought to games! 





1951-1996 年 计 算 机 的性能价格比 

大小 

相对于 

调整后的 

相对于 

( 立方 

功率 

性能 

内存 

UNIVAC 

价格 

UNIVAC 

年代 

名称 

英尺 ) 

( 瓦特 ) 

( 加法 / 秒 ) 

(KB) 价格 ($) 价格 / 性能 

(1996$) 

价格 / 性能 

1951 UNIVAC I 1000 124,500 1,900 48 1,000,000 1 4,996,749 1 

1964 IBM 

S/360-50 

60 10,000 500,000 64 1,000,000 263 4,140,257 318 

1965 PDP-8 8 500 330,000 4 16,000 10,855 66,071 13,135 

1976 Cray-1 58 60,000 166,000,000 32,768 4,000,000 21,842 8,459,712 51,604 

1981 IBM PC 1 150 240,000 256 3,000 42,105 4,081 154,673 

1991 HP 

9000/750 

2 500 50,000,000 16,384 7,400 3,556,188 8,156 16,122,356 

1996 Intel 

2 5000 400,000,000000 000 16,384 4400 4,400 47,846,890 890 4400 4,400 239,078,908 

908 

PPro/200

计 算 机 组 织 与 系 统 结 构

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