Lead and Lag Compensator Design using Frequency Domain

EE 3CL4, §9 

1 / 31 

Tim Davidson 

Frequency 

Domain 

Approach to 

Compensator 

Design 

Lead 

Compensators 

Lag 


EE3CL4: 

Introduction to Linear Control Systems 

Section 9: Design of Lead and Lag Compensators using 

Frequency Domain Techniques 

Tim Davidson 

McMaster University 

Winter 2012

EE 3CL4, §9 

2 / 31 

Tim Davidson 



Approach to 







Outline 

1 Frequency Domain Approach to Compensator Design 

2 Lead 


3 Lag 

Compensators

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Frequency domain analysis 

• Analyze closed loop using open loop transfer function 

L(s) = Gc(s)G(s)H(s). 

• Nyquist’s stability criterion 

1 

|L(jωx )| , where ωx is 

the frequency at which ∠L(jω) reaches −180 ◦ 

• Gain margin: 

• Phase margin, φpm: 180 ◦ + ∠L(jωc), where ωc is 

the frequency at which |L(jω)| equals 1 

• Damping ratio: φpm = f (ζ), 

• Settling time related to the bandwidth of the loop

EE 3CL4, §9 

5 / 31 

Tim Davidson 



Approach to 







L(jω) = 

• Gain margin ≈ 15 dB 

• Phase margin ≈ 43 ◦ 

Bode diagram 

1 

jω(1 + jω)(1 + jω/5)

EE 3CL4, §9 

6 / 31 

Tim Davidson 



Approach to 







Compensators and Bode 

diagram 

• We have seen the importance of phase margin 

• If G(s) does not have the desired margin, 

how should we choose Gc(s) so that 

L(s) = Gc(s)G(s) does? 

• To begin, how does Gc(s) affect the Bode diagram 

• Magnitude: 

� 

20 log10 |Gc(jω)G(jω)| � 

� 

= 20 log10 (|Gc(jω)| � � � 

+ 20 log10 |G(jω)| 

• Phase: 

∠Gc(jω)G(jω) = ∠Gc(jω) + ∠G(jω)

EE 3CL4, §9 

8 / 31 

Tim Davidson 



Approach to 







Lead Compensators 

• Gc(s) = Kc(s+z) 

s+p , with |z| < |p|, alternatively, 

• Gc(s) = Kc 

α 

• Bode diagram: 

1+sατ 

1+sτ , where p = 1/τ and α = p/z > 1

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Lead Compensation 

• What will lead compensation, do? 

• Phase is positive: might be able to increase phase 

margin φpm 

• Slope is positive: might be able to increase the 

cross-over frequency, ωc, (and the bandwidth)

EE 3CL4, §9 

10 / 31 

Tim Davidson 



Approach to 







• Gc(s) = Kc 1+sατ 

α 1+sτ 

Lead Compensation 

• By making the denom. � real, � can show that 

ωτ(α−1) 

∠Gc(jω) = atan 

1+α(ωτ) 2 

• Max. occurs when ω = ωm = 1 

τ √ α = √ zp 

• Max. phase angle satisfies tan(φm) = α−1 

2 √ α 

• Equivalently, sin(φm) = α−1 

α+1 

• At ω = ωm, we have |Gc(jωm)| = Kc/ √ α

EE 3CL4, §9 

11 / 31 

Tim Davidson 



Approach to 







Bode Design Principles 

• Set the loop gain so that desired steady-state error 

constants are obtained 

• Insert the compensator to modify the transient 

properties: 

• Damping: through phase margin 

• Response time: through bandwidth 

• Compensate for the attenuation of the lead network, if 

appropriate 

To maximize impact of phase lead, want peak of phase near 

ωc of the compensated open loop

EE 3CL4, §9 

12 / 31 

Tim Davidson 



Approach to 







Design Guidelines 

1 For uncompensated (i.e., proportionally controlled) 

closed loop, set gain Kp so that steady-state error 

constants of the closed loop meet specifications 

2 Evaluate the phase margin, and the amount of phase 

lead required. 

3 Add a little “safety margin” to the amount of phase lead 

4 From this, determine α using sin(φm) = α−1 

α+1 

5 Determine the frequency at which open-loop frequency 

response has magnitude −10 log 10 (α) 

6 If we set ωm to be this frequency, then ωm will be the 

cut-off frequency of the compensated loop, and hence 

we will have maximum phase contribution to the 

compensated closed loop at the appropriate frequency 

√ √ 

7 Choose τ = 1/(ωm α) and hence p = ωm α. 

8 Choose z = p/α. Set Kc = Kpα. 

9 Compensator: Gc(s) = Kc(s+z) 

s+p .

EE 3CL4, §9 

13 / 31 

Tim Davidson 



Approach to 







Example 

• Type 1 plant of order 2: G(s) = 5 

s(s+2) 

• Design goals: 

• Steady-state error due to a ramp input less than 5% of 

velocity of ramp 

• Phase margin at least 45 ◦ (implies a damping ratio) 

• Steady state error requirement implies Kv = 20. 

• For prop. controlled Type 1 plant: Kv = lims→0 sKpG(s). 

Hence Kp = 8. 

• To find phase margin of prop. controlled loop we need 

to find ωc, where |KpG(jωc)| = � � 

� 40 � = 1 

• ω ≈ 6.2rad/s 

• ∠KpG(jωc) = −90 ◦ − atan(ω/2) 

• Hence φpm, prop = 18 ◦ 

jωc(jωc+2)

EE 3CL4, §9 

14 / 31 

Tim Davidson 



Approach to 







Example 

• φpm, prop = 18 ◦ . Hence, need 27 ◦ of phase lead 

• Let’s go for a little more, say 30 ◦ 

• So, want peak phase of lead comp. to be 30 ◦ 

• Solving α−1 

α+1 = sin(30◦ ) yields α = 3 

• Since 10 log10 (3) = 4.8 dB we should choose ωm �� 

to be 

where 20 log � 40 � 

10 jωm(jωm+2) 

� = −4.8 dB 

• Solving this equations yields ωm = 8.4rad/s 

• Therefore z = ωm/ √ α = 4.8, p = αz = 14.4, 

Kc = 3 × 8 

• Gc(s) = 24(s+4.8) 

s+14.4 

• Gc(s)G(s) = 120(s+4.8) 

s(s+2)(s+14.4) , actual φpm = 43.6 ◦ 

• Goal can be achieved by using a larger target for 

additional phase, e.g., α = 3.5

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Bode Diagram

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Step Response

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Ramp Response

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Ramp Response, detail

EE 3CL4, §9 

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Tim Davidson 



Approach to 







Lag Compensators 

• Gc(s) = Kc(s+z) 

s+p , with |p| < |z|, alternatively, 

• Gc(s) = Kc 1+sτ 

α 1+sατ , where z = 1/τ and α = z/p > 1 

• We will consider case where Kc = α 

• Bode diagrams of lag compensators for two different αs

EE 3CL4, §9 

21 / 31 

Tim Davidson 



Approach to 







What will lag compensation do? 

• Since zero and pole are typically close to the origin, 

phase lag is not really used. 

• What is useful is the attenuation above ω = 1/τ: 

gain is −20 log 10 (α), with little phase lag 

• Can reduce cross-over frequency, ωc, without adding 

much phase lag 

• Tends to reduce bandwidth

EE 3CL4, §9 

22 / 31 

Tim Davidson 



Approach to 







Qualitative example 

• Uncompensated system has small phase margin 

• Phase lag of compensator does not play a large role 

• Attenuation of compensator does: 

ωc reduced by about a factor of a bit more than 3 

• Increased phase margin is due to the natural phase 

characteristic of the plant

EE 3CL4, §9 

23 / 31 

Tim Davidson 



Approach to 







Lag Compensation 

• Gc(s) = 1+sτ 

1+sατ 

• Attenuation above ω = 1/τ is 20 log 10 (α); 

i.e., gain is −20 log 10 (α) 

• Phase lag above ω = 1/τ is small

EE 3CL4, §9 

24 / 31 

Tim Davidson 



Approach to 







For lag compensators: 

Bode Design Principles 

• Set the loop gain so that desired steady-state error 

constants are obtained 

• Insert the compensator to modify the phase margin: 

• Do this by reducing the cross-over frequency 

• Observe the impact on response time 

Basic principle: Set attenuation to reduce ωc far enough so 

that uncompensated open loop has desired phase margin 

compensated open loop

EE 3CL4, §9 

25 / 31 

Tim Davidson 



Approach to 







Design Guidelines 

1 For uncompensated (i.e., proportionally controlled) 

closed loop, set gain Kp so that steady-state error 

constants of the closed loop meet specifications 

2 Obtain the Bode diagram, evaluate the phase margin. 

If that is insufficient. . . 

3 Determine ω ′ c, the frequency at which the 

uncompensated open loop has a phase margin equal 

to the desired phase margin plus 5 ◦ . 

4 Now design a lag compensator so that the gain of the 

compensated open loop at this frequency is 0 dB 

• Place the zero of the compensator around ω ′ c/10 to 

ensure we get almost full attenuation by the 

compensator at ω ′ c 

• Choose α so that 20 log 10 (α) is the attenuation needed 

to reduce the gain of the uncompensated closed loop at 

ω ′ c to 0 dB 

• Place the pole at p = z/α 

• Choose Kc = Kp/α, and hence Gc(s) = Kc(s+z) 

s+p

EE 3CL4, §9 

26 / 31 

Tim Davidson 



Approach to 







Example, same set up as lead 

design 

• Type 1 plant of order 2: G(s) = 5 

s(s+2) 

• Design goals: 

• Steady-state error due to a ramp input less than 5% of 

velocity of ramp 

• Phase margin at least 45 ◦ (implies a damping ratio) 

• Steady state error requirement implies Kv = 20. 

• For prop. controlled Type 1 plant: Kv = lims→0 sKpG(s). 

Hence Kp = 8. 

• To find phase margin of prop. controlled loop we need 

to find ωc, where |KpG(jωc)| = � � 

� 40 � = 1 

• ω ≈ 6.2rad/s 

• ∠KpG(jωc) = −90 ◦ − atan(ω/2) 

• Hence φpm, prop = 18 ◦ 

jωc(jωc+2)

EE 3CL4, §9 

27 / 31 

Tim Davidson 



Approach to 







Example 

• Since want phase margin to be 45 ◦ , we set ω ′ c such that 

∠G(jω ′ c) = −180 ◦ + 45 ◦ + 5 ◦ = 130 ◦ . =⇒ ω ′ c ≈ 1.5 

• Required attenuation is 20 dB. Actual curves are around 

2 dB lower than the straight line approximation shown 

• Hence α = 10. 

• Zero set to be one decade below ω ′ c; z = 0.15 

• Pole is z/α = 0.015 

• Gain is Kc = Kp/α = 0.8 

• Hence Gc(s) = 0.8(s+0.15) 

s+0.015

EE 3CL4, §9 

28 / 31 

Tim Davidson 



Approach to 







Example: Comp’d open loop 

• Compensated open loop: Gc(s)G(s) = 

• Numerical evaluation: 

• new ωc = 1.58 

• new phase margin = 46.8 ◦ 

• By design, Kv remains 20 

4(s+0.15) 

s(s+2)(s+0.015)

EE 3CL4, §9 

29 / 31 

Tim Davidson 



Approach to 







Step Response

EE 3CL4, §9 

30 / 31 

Tim Davidson 



Approach to 







Ramp Response

EE 3CL4, §9 

31 / 31 

Tim Davidson 



Approach to 







Ramp Response, detail

Lead and Lag Compensator Design using Frequency Domain

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