ASIC SA-27E Databook, Part 1: Base Library and I/Os - CSAIL People

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SA-27E IPECLDT, IPECLDT_PM 1.8V/2.5V PECL Test Differential Receiver Cell: IPECLDT, IPECLDT_PM Function: 1.8V/2.5V PECL Test Differential Receiver Description: Noninverting differential receiver used to receive complementary ECL signals referenced to Vdd250 (2.5V nominal) supply. All pins exclusive of PAD and PADN are referenced to the Vdd supply (1.8V nominal). A differential termination of 100 ohms is inserted between PAD and PADN. Z PAD In-phase drive in PADN Out-phase driver in LT DC current gate (Idd test) input Z Receiver out Receiver Truth Table Inputs Outputs PAD PADN LT Z Usage Notes: 1. Normal receiver operation requires a differential input signal of + 400 mV around a common mode input signal of 2.0V nominal. 2. If the input to the receiver is unknown state (Hi-Z), then the output is indeterminate. 3. During Iddq test, 2.5V CMOS levels must be applied to PAD. Standard Cell 1040 Comments 0 1 0 0 Functional mode 1 0 0 1 Functional mode 1 1 0 X Functional mode 0 0 0 X Functional mode - - 1 PAD Leakage test LT PAD PADN SA14-2208-03 June 4, 2001
Receiver Propagation Delays Path (Input to Output) . Refer to “PECL Receiver Specifications” on page 134 for more information. SA14-2208-03 June 4, 2001 Performance Level PAD-Z A Parameter Capacitance (in units of N std ) and Cell Sizes SA-27E IPECLDT, IPECLDT_PM 1.8V/2.5V PECL Test Differential Receiver Delay (ns) = intercept + slope (N std ) V dd = 1.65V V dd250 = 2.3V T j = 125˚C Process = Slow V dd = 1.8V V dd250 = 2.5V T j = 25˚ C Process = Nom. V dd = 1.95V V dd250 = 2.7V T j = 0˚C Process = Fast t PLH 0.558 + 0.001N std 0.365 + 0.001N std 0.256 + 0.001N std t PHL 0.595 + 0.001N std 0.394 + 0.000N std 0.278 + 0.000N std Input Pins Performance Level A LT 2.735 PAD (Receiver Input) 233.500 PADN (Receiver Input) 229.500 Internal 139.550 Cell Units 2 cells Standard Cell 1041
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ASIC SA-27E Databook, Part I Base L
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Date Page Description 6/4/2001 121,
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Date Page Description 9/20/2000 770
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Date Page Description 2/11/2000 479
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SA14-2208-03 June 4, 2001 Contents
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SA-27E NAND4_G 4-Way NAND .........
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SA-27E OAI22 2x2 OR AND Invert ....
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SA-27E F_LPH0002 D Latch Pseudocell
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SA-27E BP2535, BP2535_PM 2.5V (3.3V
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SA-27E BC1835PUT, BC1835PUT_PM 1.8V
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SA-27E IP25RET, IP25RET_PM 2.5V CMO
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SA14-2208-03 June 4, 2001 Cells SA-
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SA-27E BC2565PD, BC2565PD_PM ......
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SA-27E BT3365PDT, BT3365PDT_PM ....
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SA-27E INVERTBAL ..................
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SA-27E OR3_G ......................
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SA14-2208-03 June 4, 2001 Product O
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Product Summary Product Introductio
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Table 5. In-line Wire Bond Die/Pack
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Table 7. In-line Wire Bond Die-Pack
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Table 9. Staggered Wire Bond Die-Pa
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Table 11. Peripheral C4 Plastic Fli
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Table 13. Area Array C4 Organic Die
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Table 15. Peripheral C4 Ceramic Fli
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Cell Library Guide Cell Naming Conv
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NORn Logical NOR of n inputs. OAabc
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Table 20. Function Name Description
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Unused Inputs SA14-2208-03 June 4,
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Propagation Delay SA14-2208-03 June
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Propagation Delay Equation SA14-220
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Wire Routing and Fanout SA14-2208-0
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SA14-2208-03 June 4, 2001 C gate =
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SA14-2208-03 June 4, 2001 SA-27E Ce
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Standardized Burn-In Equipment SA14
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Test Methodology Descriptions Struc
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LSSD Latches Overview SA14-2208-03
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Scan Operation Set/Reset Operation
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Pseudocells Overview SA14-2208-03 J
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“PG_” Cells SA14-2208-03 June 4
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SA14-2208-03 June 4, 2001 SA-27E Ps
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Input/Output Cells Overview SA14-22
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TS Lines SA14-2208-03 June 4, 2001
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High-Voltage Interface SA14-2208-03
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I/O Specifications SA14-2208-03 Jun
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Table 37. Nontest Three-State Commo
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Table 38. Test Three-State Common I
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SA14-2208-03 June 4, 2001 SA-27E In
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Table 44. 2.5V CMOS Driver DC Volta
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Table 50. 3.3V LVTTL Driver Minimum
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Power Supply Requirements SA14-2208
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AGP Specifications Table 58. DC Spe
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GTL Specifications SA14-2208-03 Jun
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Table 64. 1.5V HSTL DC Specificatio
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Table 66. LVDS Driver DC Specificat
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Table 68. LVDS Driver DC Specificat
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SA14-2208-03 June 4, 2001 SA-27E In
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Electrical Specifications Table 71.
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Table 73. PCI-X General Timing Para
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Table 74. PECL Receiver Specificati
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Table 75. SSTL2 DC Specifications (
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1000 MHz Operation 5 Table 76. STI
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Table 77. STI Driver Specifications
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SA14-2208-03 June 4, 2001 Gate Arra
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Cell: AND2_G Function: 2-Way AND Bo
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Cell: AND3_G Function: 3-Way AND Bo
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Cell: INVERT_G Function: Inverter B
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Capacitance (in units of N std ) an
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Cell: NAND4_G Function: 4-Way NAND
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Cell: NOR4_G Function: 4-Way NOR Bo
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Cell: OR4_G Function: 4-Way OR A Bo
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Cell: AO21_G Function: 2x1 AND OR B
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Cell: AOI21_G Function: 2x1 AND OR
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Cell: OA21_G Function: 2x1 OR AND B
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Cell: OAI21_G Function: 2x1 OR AND
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Cell: BUFFER_G Function: Buffer Boo
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Cell: CLKSPC_G Function: Clock Spli
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Propagation Delays Path (Input to O
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Cell: MUX21_G Function: 2:1 Multipl
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Cell: PSHRDI1_G Function: DI1 Test
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Cell: PSHRDI2_G Function: DI2 Test
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Cell: PSHRLT_G Function: LT Test Fu
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Cell: PSHRRE_G Function: RE Test Fu
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Cell: PSHRRI_G Function: RI Test Fu
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Cell: PSHRMC_G Function: MC Test Fu
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Cell: TERM_G Function: Net Terminat
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Cell: LPH0001_G Function: D Latch,
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Cell: LPH0101_G Function: D Latch,
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Cell: D_F_LPH0001_G Function: D Lat
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SA14-2208-03 June 4, 2001 Standard
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Cell: AND2 Function: 2-Way AND Bool
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Propagation Delays (Continued) Path
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Cell: AND4 Function: 4-Way AND Bool
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Cell: NAND2 Function: 2-Way NAND Bo
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Cell: NAND4 Function: 4-Way NAND Bo
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Cell: NOR2 Function: 2-Way NOR Bool
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Cell: OR3 Function: 3-Way OR Boolea
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Cell: XOR2 Function: 2-Way XOR Bool
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Cell: XNOR3 Function: 3-Way XNOR Bo
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Cell: AO21 Function: 2x1 AND OR Boo
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Cell: AO222 Function: 2x2x2 AND OR
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Cell: AO2222 Function: 2x2x2x2 AND
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Cell: AOI21 Function: 2x1 AND OR In
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Cell: AOI222 Function: 2x2x2 AND OR
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Cell: AOI2222 Function: 2x2x2x2 AND
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Cell: OA21 Function: 2x1 OR AND Boo
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Cell: OA222 Function: 2x2x2 OR AND
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Cell: OA2222 Function: 2x2x2x2 OR B
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Cell: OAI21 Function: 2x1 OR AND In
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Cell: OAI22 Function: 2x2 OR AND In
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Cell: OAI222 Function: 2x2x OR AND
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Cell: OAI2222 Function: 2x2x2x2 OR
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Cell: ADDF Function: Full Adder Des
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Cell: BUFFER Function: Buffer Boole
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Cell: CLK Function: Clock Driver Bo
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Cell: CLKCHP Function: Clock Choppe
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Cell: CLKGATE Function: Clock Gatin
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Cell: CLKSPC Function: Clock Splitt
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Waveform Calculation Waveform 1 SA1
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Cell: CLKSPL Function: Clock Splitt
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Waveform Calculation Waveform 1 SA1
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Cell: COMP2 Function: 2-Bit Compara
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Cell: DECAP Function: V dd - GND De
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Cell: DELAY6 Function: Delay Line B
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SA14-2208-03 June 4, 2001 SA-27E DE
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SA14-2208-03 June 4, 2001 SA-27E DE
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Cell: MUX41 Function: 4:1 Multiplex
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Cell: MCMUX Function: 2:1 Mode Cont
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Cell: TERM Function: Net Terminator
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Cell: L2S0101_LPC Function: L2* Lat
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SA14-2208-03 June 4, 2001 SA-27E L2
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Technology Library Data Path Elemen
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Cell: DEC38_DP Function: 3-to-8 Dec
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Cell: MUX41I_DP Function: 4:1 Multi
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Cell: MUX81I_DP Function: 8:1 Multi
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Capacitance (in units of Nstd ) and
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Cell: CG_AND Function: Clock Gate,
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Cell: CG_OR Function: Clock Gate, O
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SA14-2208-03 June 4, 2001 SA-27E D_
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Cell: D_F_LMX0001 Function: D MUX L
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Cell: D_F_LPH0001 Function: D Latch
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Cell: D_F_LPH0002 Function: D Latch
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Cell: D_F_LPH4041_LPC Function: D L
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Cell: D_F_MPH0001_LPC Function: D-F
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Cell: D_F_MPH4041_LPC Function: D L
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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Cell: L_MPH0101_LPC Function: Trans
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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Cell: TW_ZERO_A Function: Placehold
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SA14-2208-03 June 4, 2001 SA-27E BA
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AGP 4X Driver Propagation Delays Pa
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Cell: BAGP4X, BAGP4X_PM Function: 1
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Receiver Propagation Delays Path (I
Page 487 and 488:
SA14-2208-03 June 4, 2001 SA-27E VA
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Driver Truth Table Inputs Outputs A
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Cell: BC1820, BC1820_PM Function: 1
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Driver Propagation Delays Path (Inp
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Cell: BC1835PD, BC1835PD_PM Functio
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Cell: BC1820PU, BC1820PU_PM Functio
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PAD-Z PAD-ZH PAD-Z PAD-ZH SA14-2208
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Driver Truth Table Inputs Outputs T
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SA14-2208-03 June 4, 2001 SA-27E BC
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SA14-2208-03 June 4, 2001 SA-27E BC
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SA14-2208-03 June 4, 2001 SA-27E BG
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SA14-2208-03 June 4, 2001 SA-27E BG
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. Driver Propagation Delays Path (I
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Cell: VGTLR1, VGTLR1_PM Function: G
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SA14-2208-03 June 4, 2001 SA-27E BH
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Receiver Truth Table Inputs Outputs
Page 597 and 598:
Cell: VHSTL18R1, VHSTL18R1_PM Funct
Page 599 and 600:
SA14-2208-03 June 4, 2001 SA-27E BH
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Cell: VHSTLR1, VHSTLR1_PM Function:
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Cell: BI2C25, BI2C25_PM Function: 2
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Page 611 and 612:
SA14-2208-03 June 4, 2001 SA-27E BI
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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Cell: BPCIX3, BPCIX3_PM Function: 3
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Page 647 and 648:
Driver Mode Control Table MCPP Driv
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SA14-2208-03 June 4, 2001 SA-27E BP
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. SA14-2208-03 June 4, 2001 SA-27E
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Page 655 and 656:
Page 657 and 658:
Cell: VSSTL2R1, VSSTL2R1_PM Functio
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SA14-2208-03 June 4, 2001 SA-27E BS
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Note: NDR will assume off-chip term
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Cell: BT3335, BT3335_PM Function: 3
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Cell: BT3350LV, BT3350LV_PM Functio
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Cell: BT3365, BT3365_PM Function: 3
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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PAD-Z PAD-ZH SA14-2208-03 June 4, 2
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SA14-2208-03 June 4, 2001 SA-27E BT
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A Driver Truth Table Inputs Outputs
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SA14-2208-03 June 4, 2001 SA-27E BT
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Cell: BUSB2 Function: USB Nontest 3
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Receiver Truth Table SA14-2208-03 J
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Receiver Truth Table PAD LT RI RG Z
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SA14-2208-03 June 4, 2001 SA-27E IH
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Cell: ILVDS, ILVDS_PM Function: 1.8
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Cell: ILVDSAO, ILVDSAO_PM Function:
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SA14-2208-03 June 4, 2001 SA-27E IP
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SA14-2208-03 June 4, 2001 SA-27E IS
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SA14-2208-03 June 4, 2001 SA-27E OH
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SA14-2208-03 June 4, 2001 SA-27E OL
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SA14-2208-03 June 4, 2001 SA-27E OP
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Wrap Receiver Truth Table SA14-2208
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SA14-2208-03 June 4, 2001 SA-27E OS
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Cell: VDD180DECAP, VDD180DECAP_PM F
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Cell: VDD330DECAP, VDD330DECAP_PM F
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Cell: PSRO2PD_A Function: Performan
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Cell: BAGP2X4XT, BAGP2X4XT_PM Funct
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AGP 4X Driver Propagation Delays Pa
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Cell: BAGP4XT, BAGP4XT_PM Function:
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Driver Truth Table Inputs Outputs A
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Cell: BC1820T, BC1820T_PM Function:
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Cell: BC1835PDT, BC1835PDT_PM Funct
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Cell: BC1820PUT, BC1820PUT_PM Funct
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SA14-2208-03 June 4, 2001 SA-27E BG
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SA14-2208-03 June 4, 2001 SA-27E BG
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Cell: BHSTL18C1T, BHSTL18C1T_PM Fun
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Receiver Truth Table Inputs Output
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Cell: BHSTLC1T, BHSTLC1T_PM Functio
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Receiver Truth Table PAD LT Inputs
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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Driver Mode Control Table MCPP Driv
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SA14-2208-03 June 4, 2001 SA-27E BP
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Cell: BSSTL2C1T, BSSTL2C1T_PM Funct
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Note: NDR will assume off-chip term
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Cell: BT3320T, BT3320T_PM Function:
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SA14-2208-03 June 4, 2001 SA-27E BT
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Page 989 and 990: PAD-Z PAD-ZH SA14-2208-03 June 4, 2
Page 991 and 992: Driver Truth Table Inputs Outputs T
Page 993 and 994: SA14-2208-03 June 4, 2001 SA-27E BT
Page 995 and 996: Capacitance (in units of N std ) an
Page 997 and 998: Driver Truth Table Inputs Outputs T
Page 999 and 1000: SA14-2208-03 June 4, 2001 SA-27E BT
Page 1001 and 1002: PAD-Z PAD-ZH SA14-2208-03 June 4, 2
Page 1003 and 1004: SA14-2208-03 June 4, 2001 SA-27E IC
Page 1005 and 1006: SA14-2208-03 June 4, 2001 SA-27E IC
Page 1007 and 1008: Cell: IC18LTPUT, IC18LTPUT_PM Funct
Page 1009 and 1010: Cell: IC18PDT, IC18PDT_PM Function:
Page 1013 and 1014: Cell: IC18RIT, IC18RIT_PM Function:
Page 1015 and 1016: Cell: IC18TEPDT, IC18TEPDT_PM Funct
Page 1017 and 1018: Receiver Propagation Delays Path (I
Page 1023 and 1024: Cell: IP25D1T, IP25D1T_PM Function:
Page 1025 and 1026: Cell: IP25LTT, IP25LTT_PM Function:
Page 1027 and 1028: SA14-2208-03 June 4, 2001 SA-27E IP
Page 1031 and 1032: Cell: IP33D1T, IP33D1T_PM Function:
Page 1033 and 1034: Cell: IP33LTT, IP33LTT_PM Function:
Page 1035 and 1036: SA14-2208-03 June 4, 2001 SA-27E IP
Page 1039: Receiver Propagation Delays Path (I
Page 1043 and 1044: Block Delay Truth Table SA14-2208-0
Page 1045 and 1046: SA14-2208-03 June 4, 2001 Standard
Page 1047 and 1048: Cell: GND_PM_A Function: Programmab
Page 1049 and 1050: ABIST Array built-in self-test used
Page 1051 and 1052: SA-27E test I/O A chip input or out
Page 1053 and 1054: Numerics 1.8V CMOS driver minimum D
Page 1055 and 1056: EFR, 70, 1049 electrical specificat
Page 1057 and 1058: menus, 41, 50, 51 metal interconnec
Page 1059 and 1060: SC. See standard cell scan circuitr
Page 1062: ® © International Business Machin
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ASIC SA-27E Databook, Part 1: Base Library and I/Os - CSAIL People

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