ASIC SA-27E Databook, Part 1: Base Library and I/Os - CSAIL People

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SA-27E BC2590PUT, BC2590PUT_PM 2.5V CMOS Test 90 Ohm 3-State CIO w/Pull-Up Receiver Propagation Delays Path (Input to Output) PAD-Z PAD-ZH PAD-Z PAD-ZH PAD-Z PAD-ZH Standard Cell 878 Performance Level A B C Parameter Capacitance (in units of N std ) and Cell Sizes Delay (ns) = intercept + slope (N std) V dd = 1.65V V dd250 = 2.3V T j = 125˚C Process = Slow V dd = 1.8V V dd250 = 2.5V T j = 25˚ C Process = Nom. V dd = 1.95V V dd250 = 2.7V T j = 0˚C Process = Fast t PLH 0.420 + 0.002N std 0.283 + 0.001N std 0.210 + 0.001N std t PHL 0.403 + 0.002N std 0.323 + 0.001N std 0.263 + 0.001N std t PLH 0.604 + 0.002N std 0.425 + 0.001N std 0.336 + 0.001N std t PHL 0.562 + 0.002N std 0.465 + 0.001N std 0.387 + 0.001N std t PLH 0.425 + 0.002N std 0.279 + 0.001N std 0.204 + 0.001N std t PHL 0.408 + 0.002N std 0.323 + 0.001N std 0.260 + 0.001N std t PLH 0.613 + 0.002N std 0.426 + 0.001N std 0.334 + 0.001N std t PHL 0.569 + 0.002N std 0.472 + 0.001N std 0.391 + 0.001N std t PLH 0.425 + 0.002N std 0.279 + 0.001N std 0.204 + 0.001N std t PHL 0.408 + 0.002N std 0.323 + 0.001N std 0.260 + 0.001N std t PLH 0.613 + 0.002N std 0.426 + 0.001N std 0.334 + 0.001N std t PHL 0.569 + 0.002N std 0.472 + 0.001N std 0.391 + 0.001N std Input Pins Performance Level A B C A 11.241 11.241 11.240 DI 7.661 7.661 7.661 PAD (Receiver Input) 343.750 343.750 343.750 RG 2.002 2.002 2.002 TS 6.503 6.503 6.503 TT 4.281 4.281 4.281 Internal 410.000 412.000 417.000 Cell Units 1 cell 1 cell 1 cell SA14-2208-03 June 4, 2001
SA14-2208-03 June 4, 2001 SA-27E BGTLDT, BGTLDT_PM Test GTL CIO for Double Termination Cell: BGTLDT, BGTLDT_PM Function: Test GTL CIO for Double Termination Description: Noninverting bidirectional driver/receiver with three-state control. Output di/dt and perfor- DI ZDI mance are chosen by performance level selection. Off-chip termination requires 25Ω to 1.2V or 1.5V (VTT ). On-chip termination is provided only for chip testing. Receiver requires (off chip) input reference (VTT *2/3). RG and RI disable differential circuit within the receiver to reduce power consumption. A, TS, and Z must be wired to latches for boundary scan. If RG is not used, it should be tied to Vdd . RE A TS PAD LT A TS DI Driver data input Driver three-state control Driver inhibit input (DI in) Z + - VREF RG RE Reference enable input RG Receiver gate control LT DC current gate (Idd test) input VREF Voltage reference input PAD Driver output/receiver input Z Non-hysteresis receiver output ZDI Driver inhibit output (DI out) Standard Cell 879
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ASIC SA-27E Databook, Part I Base L
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Date Page Description 6/4/2001 121,
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Date Page Description 9/20/2000 770
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Date Page Description 2/11/2000 479
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SA14-2208-03 June 4, 2001 Contents
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SA-27E NAND4_G 4-Way NAND .........
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SA-27E OAI22 2x2 OR AND Invert ....
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SA-27E F_LPH0002 D Latch Pseudocell
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SA-27E BP2535, BP2535_PM 2.5V (3.3V
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SA-27E BC1835PUT, BC1835PUT_PM 1.8V
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SA-27E IP25RET, IP25RET_PM 2.5V CMO
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SA14-2208-03 June 4, 2001 Cells SA-
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SA-27E BC2565PD, BC2565PD_PM ......
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SA-27E BT3365PDT, BT3365PDT_PM ....
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SA-27E INVERTBAL ..................
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SA-27E OR3_G ......................
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SA14-2208-03 June 4, 2001 Product O
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Product Summary Product Introductio
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Table 5. In-line Wire Bond Die/Pack
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Table 7. In-line Wire Bond Die-Pack
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Table 9. Staggered Wire Bond Die-Pa
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Table 11. Peripheral C4 Plastic Fli
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Table 13. Area Array C4 Organic Die
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Table 15. Peripheral C4 Ceramic Fli
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Cell Library Guide Cell Naming Conv
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NORn Logical NOR of n inputs. OAabc
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Table 20. Function Name Description
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Unused Inputs SA14-2208-03 June 4,
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Propagation Delay SA14-2208-03 June
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Propagation Delay Equation SA14-220
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Wire Routing and Fanout SA14-2208-0
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SA14-2208-03 June 4, 2001 C gate =
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SA14-2208-03 June 4, 2001 SA-27E Ce
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Standardized Burn-In Equipment SA14
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Test Methodology Descriptions Struc
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LSSD Latches Overview SA14-2208-03
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Scan Operation Set/Reset Operation
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Pseudocells Overview SA14-2208-03 J
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“PG_” Cells SA14-2208-03 June 4
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SA14-2208-03 June 4, 2001 SA-27E Ps
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Input/Output Cells Overview SA14-22
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TS Lines SA14-2208-03 June 4, 2001
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High-Voltage Interface SA14-2208-03
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I/O Specifications SA14-2208-03 Jun
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Table 37. Nontest Three-State Commo
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Table 38. Test Three-State Common I
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SA14-2208-03 June 4, 2001 SA-27E In
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Table 44. 2.5V CMOS Driver DC Volta
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Table 50. 3.3V LVTTL Driver Minimum
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Power Supply Requirements SA14-2208
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AGP Specifications Table 58. DC Spe
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GTL Specifications SA14-2208-03 Jun
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Table 64. 1.5V HSTL DC Specificatio
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Table 66. LVDS Driver DC Specificat
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Table 68. LVDS Driver DC Specificat
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SA14-2208-03 June 4, 2001 SA-27E In
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Electrical Specifications Table 71.
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Table 73. PCI-X General Timing Para
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Table 74. PECL Receiver Specificati
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Table 75. SSTL2 DC Specifications (
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1000 MHz Operation 5 Table 76. STI
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Table 77. STI Driver Specifications
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SA14-2208-03 June 4, 2001 Gate Arra
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Cell: AND2_G Function: 2-Way AND Bo
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Cell: AND3_G Function: 3-Way AND Bo
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Cell: INVERT_G Function: Inverter B
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Capacitance (in units of N std ) an
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Cell: NAND4_G Function: 4-Way NAND
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Cell: NOR4_G Function: 4-Way NOR Bo
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Cell: OR4_G Function: 4-Way OR A Bo
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Cell: AO21_G Function: 2x1 AND OR B
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Cell: AOI21_G Function: 2x1 AND OR
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Cell: OA21_G Function: 2x1 OR AND B
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Cell: OAI21_G Function: 2x1 OR AND
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Cell: BUFFER_G Function: Buffer Boo
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Cell: CLKSPC_G Function: Clock Spli
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Propagation Delays Path (Input to O
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Cell: MUX21_G Function: 2:1 Multipl
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Cell: PSHRDI1_G Function: DI1 Test
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Cell: PSHRDI2_G Function: DI2 Test
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Cell: PSHRLT_G Function: LT Test Fu
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Cell: PSHRRE_G Function: RE Test Fu
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Cell: PSHRRI_G Function: RI Test Fu
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Cell: PSHRMC_G Function: MC Test Fu
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Cell: TERM_G Function: Net Terminat
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Cell: LPH0001_G Function: D Latch,
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Cell: LPH0101_G Function: D Latch,
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Cell: D_F_LPH0001_G Function: D Lat
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SA14-2208-03 June 4, 2001 Standard
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Cell: AND2 Function: 2-Way AND Bool
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Propagation Delays (Continued) Path
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Cell: AND4 Function: 4-Way AND Bool
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Cell: NAND2 Function: 2-Way NAND Bo
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Cell: NAND4 Function: 4-Way NAND Bo
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Cell: NOR2 Function: 2-Way NOR Bool
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Cell: OR3 Function: 3-Way OR Boolea
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Cell: XOR2 Function: 2-Way XOR Bool
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Cell: XNOR3 Function: 3-Way XNOR Bo
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Cell: AO21 Function: 2x1 AND OR Boo
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Cell: AO222 Function: 2x2x2 AND OR
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Cell: AO2222 Function: 2x2x2x2 AND
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Cell: AOI21 Function: 2x1 AND OR In
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Cell: AOI222 Function: 2x2x2 AND OR
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Cell: AOI2222 Function: 2x2x2x2 AND
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Cell: OA21 Function: 2x1 OR AND Boo
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Cell: OA222 Function: 2x2x2 OR AND
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Cell: OA2222 Function: 2x2x2x2 OR B
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Cell: OAI21 Function: 2x1 OR AND In
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Cell: OAI22 Function: 2x2 OR AND In
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Cell: OAI222 Function: 2x2x OR AND
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Cell: OAI2222 Function: 2x2x2x2 OR
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Cell: ADDF Function: Full Adder Des
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Cell: BUFFER Function: Buffer Boole
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Cell: CLK Function: Clock Driver Bo
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Cell: CLKCHP Function: Clock Choppe
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Cell: CLKGATE Function: Clock Gatin
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Cell: CLKSPC Function: Clock Splitt
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Waveform Calculation Waveform 1 SA1
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Cell: CLKSPL Function: Clock Splitt
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Waveform Calculation Waveform 1 SA1
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Cell: COMP2 Function: 2-Bit Compara
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Cell: DECAP Function: V dd - GND De
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Cell: DELAY6 Function: Delay Line B
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SA14-2208-03 June 4, 2001 SA-27E DE
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SA14-2208-03 June 4, 2001 SA-27E DE
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Cell: MUX41 Function: 4:1 Multiplex
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Cell: MCMUX Function: 2:1 Mode Cont
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Cell: TERM Function: Net Terminator
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Cell: L2S0101_LPC Function: L2* Lat
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SA14-2208-03 June 4, 2001 SA-27E L2
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Technology Library Data Path Elemen
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Cell: DEC38_DP Function: 3-to-8 Dec
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Cell: MUX41I_DP Function: 4:1 Multi
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Cell: MUX81I_DP Function: 8:1 Multi
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Capacitance (in units of Nstd ) and
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Cell: CG_AND Function: Clock Gate,
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Cell: CG_OR Function: Clock Gate, O
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SA14-2208-03 June 4, 2001 SA-27E D_
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Cell: D_F_LMX0001 Function: D MUX L
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Cell: D_F_LPH0001 Function: D Latch
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Cell: D_F_LPH0002 Function: D Latch
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Cell: D_F_LPH4041_LPC Function: D L
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Cell: D_F_MPH0001_LPC Function: D-F
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Cell: D_F_MPH4041_LPC Function: D L
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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SA14-2208-03 June 4, 2001 SA-27E F_
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Cell: L_MPH0101_LPC Function: Trans
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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SA14-2208-03 June 4, 2001 SA-27E PG
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Cell: TW_ZERO_A Function: Placehold
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SA14-2208-03 June 4, 2001 SA-27E BA
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AGP 4X Driver Propagation Delays Pa
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Cell: BAGP4X, BAGP4X_PM Function: 1
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Receiver Propagation Delays Path (I
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SA14-2208-03 June 4, 2001 SA-27E VA
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Driver Truth Table Inputs Outputs A
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Cell: BC1820, BC1820_PM Function: 1
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Driver Propagation Delays Path (Inp
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Cell: BC1835PD, BC1835PD_PM Functio
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Cell: BC1820PU, BC1820PU_PM Functio
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PAD-Z PAD-ZH PAD-Z PAD-ZH SA14-2208
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Driver Truth Table Inputs Outputs T
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SA14-2208-03 June 4, 2001 SA-27E BC
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SA14-2208-03 June 4, 2001 SA-27E BC
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SA14-2208-03 June 4, 2001 SA-27E BG
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SA14-2208-03 June 4, 2001 SA-27E BG
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. Driver Propagation Delays Path (I
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Cell: VGTLR1, VGTLR1_PM Function: G
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SA14-2208-03 June 4, 2001 SA-27E BH
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Receiver Truth Table Inputs Outputs
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Cell: VHSTL18R1, VHSTL18R1_PM Funct
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SA14-2208-03 June 4, 2001 SA-27E BH
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Cell: VHSTLR1, VHSTLR1_PM Function:
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Cell: BI2C25, BI2C25_PM Function: 2
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SA14-2208-03 June 4, 2001 SA-27E BI
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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SA14-2208-03 June 4, 2001 SA-27E BP
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Cell: BPCIX3, BPCIX3_PM Function: 3
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Driver Mode Control Table MCPP Driv
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SA14-2208-03 June 4, 2001 SA-27E BP
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. SA14-2208-03 June 4, 2001 SA-27E
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Cell: VSSTL2R1, VSSTL2R1_PM Functio
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SA14-2208-03 June 4, 2001 SA-27E BS
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Note: NDR will assume off-chip term
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Cell: BT3335, BT3335_PM Function: 3
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Cell: BT3350LV, BT3350LV_PM Functio
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Cell: BT3365, BT3365_PM Function: 3
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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PAD-Z PAD-ZH SA14-2208-03 June 4, 2
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SA14-2208-03 June 4, 2001 SA-27E BT
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A Driver Truth Table Inputs Outputs
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SA14-2208-03 June 4, 2001 SA-27E BT
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Cell: BUSB2 Function: USB Nontest 3
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Receiver Truth Table SA14-2208-03 J
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Receiver Truth Table PAD LT RI RG Z
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SA14-2208-03 June 4, 2001 SA-27E IH
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Cell: ILVDS, ILVDS_PM Function: 1.8
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Cell: ILVDSAO, ILVDSAO_PM Function:
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SA14-2208-03 June 4, 2001 SA-27E IP
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SA14-2208-03 June 4, 2001 SA-27E IS
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SA14-2208-03 June 4, 2001 SA-27E OH
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SA14-2208-03 June 4, 2001 SA-27E OL
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SA14-2208-03 June 4, 2001 SA-27E OP
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Wrap Receiver Truth Table SA14-2208
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SA14-2208-03 June 4, 2001 SA-27E OS
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Cell: VDD180DECAP, VDD180DECAP_PM F
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Cell: VDD330DECAP, VDD330DECAP_PM F
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Cell: PSRO2PD_A Function: Performan
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Cell: BAGP2X4XT, BAGP2X4XT_PM Funct
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AGP 4X Driver Propagation Delays Pa
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Cell: BAGP4XT, BAGP4XT_PM Function:
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Driver Truth Table Inputs Outputs A
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Cell: BC1820T, BC1820T_PM Function:
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Cell: BC1835PDT, BC1835PDT_PM Funct
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Cell: BC1865PDT, BC1865PDT_PM Funct
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Cell: BC1820PUT, BC1820PUT_PM Funct
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Cell: BC1850PUT, BC1850PUT_PM Funct
Page 827 and 828: PAD-Z PAD-ZH PAD-Z PAD-ZH SA14-2208
Page 829 and 830: Driver Truth Table Inputs Outputs T
Page 831 and 832: Cell: BC1890PUT, BC1890PUT_PM Funct
Page 833 and 834: PAD-Z PAD-ZH PAD-Z PAD-ZH SA14-2208
Page 835 and 836: Driver Propagation Delays Path (Inp
Page 837 and 838: Cell: BC2535T, BC2535T_PM Function:
Page 839 and 840: Capacitance (in units of N std ) an
Page 843 and 844: Cell: BC2565T, BC2565T_PM Function:
Page 849 and 850: Cell: BC2520PDT, BC2520PDT_PM Funct
Page 869 and 870: Receiver Propagation Delays Path (I
Page 877: Driver Truth Table Inputs Outputs T
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Page 887 and 888: Cell: BHSTL18C1T, BHSTL18C1T_PM Fun
Page 891 and 892: Receiver Truth Table Inputs Output
Page 893 and 894: Cell: BHSTLC1T, BHSTLC1T_PM Functio
Page 897 and 898: Receiver Truth Table PAD LT Inputs
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SA14-2208-03 June 4, 2001 SA-27E BP
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Driver Mode Control Table MCPP Driv
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SA14-2208-03 June 4, 2001 SA-27E BP
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Cell: BSSTL2C1T, BSSTL2C1T_PM Funct
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Receiver Truth Table Inputs Output
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Note: NDR will assume off-chip term
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Receiver Truth Table Inputs Output
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Cell: BT3320T, BT3320T_PM Function:
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E BT
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SA14-2208-03 June 4, 2001 SA-27E IC
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SA14-2208-03 June 4, 2001 SA-27E IC
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Cell: IC18LTPUT, IC18LTPUT_PM Funct
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Cell: IC18PDT, IC18PDT_PM Function:
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Cell: IC18RIT, IC18RIT_PM Function:
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Cell: IC18TEPDT, IC18TEPDT_PM Funct
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Cell: IP25D1T, IP25D1T_PM Function:
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Cell: IP25LTT, IP25LTT_PM Function:
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SA14-2208-03 June 4, 2001 SA-27E IP
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Cell: IP33D1T, IP33D1T_PM Function:
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Cell: IP33LTT, IP33LTT_PM Function:
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SA14-2208-03 June 4, 2001 SA-27E IP
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Block Delay Truth Table SA14-2208-0
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Cell: GND_PM_A Function: Programmab
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ABIST Array built-in self-test used
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SA-27E test I/O A chip input or out
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Numerics 1.8V CMOS driver minimum D
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EFR, 70, 1049 electrical specificat
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menus, 41, 50, 51 metal interconnec
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SC. See standard cell scan circuitr
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® © International Business Machin
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ASIC SA-27E Databook, Part 1: Base Library and I/Os - CSAIL People

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