Renesas MCU M16C Family (R32C/M32C/M16C/R8C) - Glyn
Renesas MCU M16C Family (R32C/M32C/M16C/R8C) - Glyn
Renesas MCU M16C Family (R32C/M32C/M16C/R8C) - Glyn
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Concepts<br />
Excellent Reliability<br />
The <strong>M16C</strong> <strong>Family</strong> incorporates many design features to ensure reliable operation under a variety of<br />
conditions.<br />
On-Chip Oscillator with Fail Safe Feature<br />
Enhanced Reliability with On-Chip Oscillator and Oscillation Stop Detection Circuit<br />
Detects abnormal interruption of XIN oscillator input and switches to the on-chip oscillator in order to continue microcomputer operation.<br />
Normal XIN Oscillator Input<br />
On-Chip<br />
Oscillator<br />
Protecting Critical Registers<br />
The register protect feature can<br />
be used to safeguard access to<br />
important registers and ports.<br />
This can prevent unauthorized<br />
access to key registers should<br />
program runaway occur. It is<br />
necessary to set the protect<br />
register before accessing<br />
important registers.<br />
Grouping Together of Important Pins<br />
The pin layout is designed to<br />
simplify arrangement of power<br />
supply and ground lines and<br />
facilitate the connection of<br />
decoupling capacitors. This also<br />
minimizes the chances of short<br />
circuit.<br />
1<br />
BYTE<br />
Abnormal Interruption of<br />
XIN Oscillator Input<br />
On-Chip<br />
Oscillator<br />
XIN XIN XIN<br />
CNVSS<br />
2STOP<br />
XCIN<br />
XCOUT<br />
RESET<br />
XOUT<br />
VSS<br />
XIN<br />
VCC<br />
GND RESET<br />
IC GND VCC<br />
Operation Switches to<br />
On-Chip Oscillator<br />
CPU CPU CPU<br />
CPU<br />
On-Chip<br />
Oscillator<br />
Other Features<br />
• It is possible to use software to halt XIN oscillator input and <strong>MCU</strong> can operate using the high-speed on-chip oscillator instead. (This also reduces power consumption.)<br />
• The watchdog timer can operate independently using the separate low-speed (125kHz) on-chip ascillator.<br />
Normal Operation Abnormal Operation<br />
Protect<br />
Register<br />
CPU<br />
Important Register Important Register<br />
Grouped in one location. Minimizes chances of short circuit<br />
NMI<br />
*Wiring example.<br />
10