Renesas MCU M16C Family (R32C/M32C/M16C/R8C) - Glyn

Bus Control
As the CPU operation speed increases, timing control of the external devices becomes more difficult.
Expanded Number of Wait Cycles
1 to 7 Bus Wait Cycles
BCLK
Address
CS
Data (Read)
RD
Data (Write)
WR
BCLK
Address
CS
Data (Read)
RD
Data (Write)
WR
1ø~3ø 1ø~6ø
Expanded Number of Address and Data Hold Cycles
(Support for Recovery Cycle Function)
Recovery Cycle
Enhanced External Bus Access Functions
Address Hold
Data Hold
Dual Peripheral Power Supplies (5V and 3V)
Possible to connect external 5V and 3V peripheral ICs
without adding external circuitry.
P6 to P10, P11, P14 : 2.7V VCC1 5.5V
P0 to P5, P12, P13 : 2.7V VCC2 VCC1
Access Cycles to External Area (32MHz)
0 Wait Cycles 62.4ns
1 Wait Cycles 93.6ns
2 Wait Cycles 124.8ns
3 Wait Cycles 156.0ns
4 Wait Cycles 187.2ns
5 Wait Cycles 218.4ns Function
6 Wait Cycles 249.6ns Extension
7 Wait Cycles 280.8ns
Possible to connect external ASIC or slow memory even
when CPU operates at high speed.
3.3V 3.3V (VCC2) 5V (VCC1) 5V
3V IC 3V I/F M16C 5V I/F 5V IC
Recovery cycle insertion can be
selected by a program.
Extended Address Hold
Extended Data Hold
Note: This specification applies to consumer products only.
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