A Top-Down Verilog-A Design on the Analog-and-Digital
A Top-Down Verilog-A Design on the Analog-and-Digital
A Top-Down Verilog-A Design on the Analog-and-Digital
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
Refere nce A<br />
[1] Razavi, <str<strong>on</strong>g>Design</str<strong>on</strong>g> of <strong>Analog</strong> CMOS ICs.<br />
[2] Toshio<br />
Murayama, Yuji Gendai, “A <str<strong>on</strong>g>Top</str<strong>on</strong>g>-<str<strong>on</strong>g>Down</str<strong>on</strong>g> Mixed-Signal <str<strong>on</strong>g>Design</str<strong>on</strong>g><br />
Methodology Using a Mixed-Signal Simulator<br />
<strong>and</strong> <strong>Analog</strong> HDL”, 1996, IEEE<br />
[3] Rol<strong>and</strong> E. Best, “Phase-Locked Loops, <str<strong>on</strong>g>Design</str<strong>on</strong>g>, Simulati<strong>on</strong>, <strong>and</strong> Applicati<strong>on</strong>”<br />
43
Change language