abstract models of noc-based mpsocs for design space exploration
abstract models of noc-based mpsocs for design space exploration
abstract models of noc-based mpsocs for design space exploration
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function!Ψ!:!E!→!V!x!V,!which!maps!an!edge!onto!a!pair!<strong>of</strong>!vertices!(vi!,vj).!Each!edge!eij!∈E!has!a!<br />
weigh!factor!λij!that!represents!the!average!number!<strong>of</strong>!packets!per!time!step!transmitted!from!vi!<br />
to!vj,!1!≤!i;!j!≤!n;!where!n!is!the!number!<strong>of</strong>!PEs.!Results!show!the!impact!<strong>of</strong>!the!number!<strong>of</strong>!ports!and!<br />
buffer!depth!on!the!total!router!power!dissipation.!A!MPEG4!application!was!used!to!verify!the!<br />
efficiency!<strong>of</strong>!the!proposed!methodology.!!<br />
!<br />
Figure!14!S!(a)!traffic!distribution!graph!(TDG)!example!and!(b)!its!corresponding!traffic!distribution!matrix!<br />
(λ).!Figure!extracted!from![ELM09].!<br />
Lee!et!al.![LEE09]!propose!a!power!estimation!framework!<strong>for</strong>!SoCs,!using!power!pr<strong>of</strong>iles!to!<br />
produce!cycle!accurate!results.!The!SoC!is!divided!in!its!building!blocks!(e.g.!processors,!memories,!<br />
communication!and!peripherals)!and!the!power!estimation!is!<strong>based</strong>!on!the!RTL!analysis!<strong>of</strong>!each!<br />
component.!The!authors!validate!the!framework!using!an!ARM926EJSS!CPU!and!the!AMBA!AXI!3.0!<br />
as!NoC.!Results!have!a!maximum!error!<strong>of</strong>!10%!compared!with!a!gateSlevel!power!evaluation,!and!<br />
an! average! error! <strong>of</strong>! 5%.! SpeedSup! compared! to! a! gate! level! simulation! is! in! average! 100! times!<br />
faster.!<br />
Milojevic!et!al.![MIL09]!describe!the!3MF!MPSoC,!a!NoCS<strong>based</strong>!MPSoC!plat<strong>for</strong>m!<strong>for</strong>!lowS<br />
power! video! coding! applications! (e.g.! HDTV,! AVC/H.264,! MPEG4).! The! 3MF! MPSoC! plat<strong>for</strong>m! is!<br />
composed!<strong>of</strong>!13!IPs!(e.g.!six!ADRES!processors![VER05],!one!ARM!and!4!memories)!interconnected!<br />
by! the! Artemis! NoC! infrastructure! [PIM01].! The! power! dissipation! <strong>of</strong>! three! different!<br />
implementation!scenarios!<strong>of</strong>!the!plat<strong>for</strong>m!(e.g.!application!mapping,!arbitration)!were!evaluated.!<br />
Results!show!that!the!difference!in!the!power!dissipation!can!achieve!26%!due!to!the!application!<br />
mapping!(comparing!the!worst!and!the!best!case!application!mapping).!!<br />
Anagnostopoulos! et! al.! [ANA10]! propose! a! systematic! methodology! to! reduce! the! NoC!<br />
overall!temperature,!employing!three!different!techniques:!(i)!powerSaware!routing!algorithms,!(ii)!<br />
buffer!sizing!and!(iii)!direct!connection.!This!methodology!can!be!applied!to!both!2D!and!3D!NoC!<br />
<strong>design</strong>s.!The!temperature!optimization!is!achieved!by!mapping!the!application!to!the!selected!NoC!<br />
architecture,! using! a! bandwidthSconstraint! mapping! algorithm.! The! next! step! in! the! proposed!<br />
methodology!is!to!obtain!thermal!pr<strong>of</strong>iles!<strong>for</strong>!the!mapped!NoC,!using!a!highSlevel!NoC!simulator.!<br />
In!this!step,!three!different!powerSaware!routing!algorithms!can!be!selected,!different!buffer!sizes!
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