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abstract models of noc-based mpsocs for design space exploration

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execution!<strong>of</strong>!applications!running!on!top!<strong>of</strong>!the!NoCS<strong>based</strong>!plat<strong>for</strong>m!<strong>models</strong>.!The!jointSexecution!<br />

enable!<strong>design</strong>ers!to!analyze!the!impact!<strong>of</strong>!a!set!<strong>of</strong>!applications!running!in!parallel!when!they!are!<br />

executed! on! a! particular! plat<strong>for</strong>m.! This! layer! comprises! the! Mapper! actor,! which! has! access! to!<br />

in<strong>for</strong>mation!from!both!the!application!(by!communication!with!the!directors!<strong>of</strong>!sequencing!actors)!<br />

and!plat<strong>for</strong>m!<strong>models</strong>!(by!communication!with!the!<strong>abstract</strong>!PEs).!!<br />

!<br />

A!lifeline!is!the!smallest!grain!<strong>of</strong>!the!proposed!mapping!approach!and!the!Mapper!can!map!<br />

one! or! more! lifelines! onto! one! <strong>of</strong>! the! available! PEs! <strong>of</strong>! the! plat<strong>for</strong>m,! defining! it! as! mono! or!<br />

multitask!(indicating!that!more!than!one!lifeline!is!mapped!onto!it).!For!the!example!in!Figure!32,!<br />

PE/01!(AB1/and!AB2)!and!PE/00!(AB3/and!AB4)!are!considered!multitask,!whereas!PE/10!and!PE/11/<br />

are! monoSprocessors.! The! Mapper! defines! its! lifeline! mapping/ table! according! to! the! static!<br />

mapping!heuristics!that!were!incorporated!into!this!mapper!model!layer!by!integrating!the!CAFES!<br />

tool! [MAR05b][MAR08].! Other! tools! could! also! be! used! <strong>for</strong>! mapping! definition,! but! CAFES! was!<br />

chosen,! since! it! include! several! mapping! heuristics,! such! as:! exhaustive! search! (ES),! simulated!<br />

annealing!(SA),!taboo!search!(TS),!and!greedy!incremental!heuristic!(GI)![MAR08],!increasing!the!<br />

<strong>design</strong>! <strong>space</strong>! <strong>exploration</strong>.! There<strong>for</strong>e,! the! presented! approach! is! extensible,! enabling! different!<br />

mapping! algorithms! and! heuristics! to! be! implemented! and! integrated! into! the! mapper! layer!<br />

without!changing!the!other!layers.!!<br />

5.4 Unified Model Execution Flow<br />

Figure!32!enumerates!the!execution!<strong>of</strong>!the!unified!model,!from!the!sending!and!receiving!<br />

times! <strong>of</strong>! a! message! (m3).! Assuming! that! messages! m1! and! m2! were! already! sent! and! received!<br />

to/by!their!applications!blocks.!The!application!block!AB1/sent!the!message!(m3)!to!the!sequencing!<br />

actor!(SD1),!which!receives!it!(1).!When!m3/is!received,!a!preSdefined!message!within!its!sequence!<br />

diagram!is!triggered,!(according!to!the!example,!the!message!m3!sent!from!lifeline!AB1/to!lifeline!<br />

AB3)!S!(2).!When!this!happens,!the!corresponding!director!Director/2!interrupts!the!delivery!and!<br />

notifies! the! mapper! about! the! message! (3).! Since! the! mapper! is! responsible! <strong>of</strong>! assigning! each!<br />

lifeline!to!a!PE,!it!knows!that!<strong>for</strong>!instance!lifeline!AB1/is!mapped!to!PE/01,!whereas!AB3/is!mapped!<br />

to!PE/00.!Once!the!mapper!receives!the!in<strong>for</strong>mation!about!the!triggered!message,!it!will!command!<br />

the! processing! element! (PE/ 01)! associated! to! the! sender! <strong>of</strong>! the! message! (m3)! to! generate! the!<br />

corresponding!traffic!into!the!NoC!plat<strong>for</strong>m.!Thus,!it!must!create!a!packet!(according!its!structure)!<br />

and! write! this! packet! on! the! local! input! port! <strong>of</strong>! the! corresponding! Router/ 01! –! (4).! Then! the!<br />

mapper!waits!until!the!processing!element!(PE/01)!associated!to!the!receiver!<strong>of</strong>!the!message!(m3)!<br />

notifies!the!complete!reception!<strong>of</strong>!the!packet!(5)!and!(6).!Upon!notification,!the!mapper!calls!back!<br />

the!Director/2!(which!has!notified!the!triggering!<strong>of</strong>!the!message)!and!in<strong>for</strong>ms!it!that!the!message!<br />

can!now!be!delivered!(7).!After!that,!the!Director/2!can!<strong>for</strong>ward!the!message!to!the!output!port!<strong>of</strong>!<br />

the!SD1,!and!the!message!reaches!its!destination!(AB3)!with!the!exact!latency!that!it!would!take!if!<br />

the!application!is!executed!on!top!<strong>of</strong>!the!implementation!plat<strong>for</strong>m!(8).!!<br />

The!effective!comparison!<strong>of</strong>!<strong>design</strong>!alternatives!<strong>of</strong>!NoCS<strong>based</strong>!MPSoCs!requires!a!complete!<br />

<strong>design</strong>! flow! including! application! and! plat<strong>for</strong>m! modeling,! mapping! and! evaluation! tools.! The!<br />

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