abstract models of noc-based mpsocs for design space exploration
abstract models of noc-based mpsocs for design space exploration
abstract models of noc-based mpsocs for design space exploration
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transaction! level! [PIM06].! As! defined! in! [PIM08],! each! PE! is! parameterized! with! a! table! <strong>of</strong>!<br />
operation!latencies!(e.g.!table!<strong>of</strong>!processor!1!with!latency!values!<strong>for</strong>!the!operations!X,!Y!and!Z,!as!<br />
shown!in!Figure!15!(b)).!The!operation!latency!values!are!extracted!from!SimpleScalar!ISS![AUS02]!<br />
simulation! and! used! to! statically! calibrate! the! architecture! model! components.! In! [PIM06]! and!<br />
[PIM08],!the!calibration!<strong>of</strong>!communication!infrastructures!or!memory!model!components!is!not!<br />
addressed.! A! case! study! <strong>of</strong>! a! MotionSJPEG! (MSJPEG)! encoder! application! was! used! to! verify! the!<br />
efficiency!<strong>of</strong>!the!proposed!environment.!<br />
!<br />
(a) (b)<br />
Figure!15!S!(a)!YSchart!<strong>design</strong>!<strong>space</strong>!<strong>exploration</strong>!flow,!and!(b)!Sesame's!model!layers.!Figures!obtained!from!<br />
[PIM06]!and![PIM08],!respectively.!<br />
Kempf!et!al.![KEM05]!present!a!SystemCS<strong>based</strong>!framework!that!enables!the!evaluation!<strong>of</strong>!<br />
application!mapping!onto!the!virtual!PEs!(following!the!YSchart!<strong>design</strong>!approach![KIE02])!by!means!<br />
<strong>of</strong>! an! executable! per<strong>for</strong>mance! model,! which! is! defined! by! an! XML! description.! The! XML!<br />
configuration!file!defines:!<br />
• the!configuration!<strong>of</strong>!the!timing!model!(e.g.!the!number!<strong>of</strong>!required!cycles!per!task!<br />
execution),!!<br />
• the!number!<strong>of</strong>!available!PEs!and!number!<strong>of</strong>!supported!concurrent!threads!per!PE,!<br />
• application!mapping!onto!the!PEs,!<br />
• parameterization,!instantiation,!and!interconnection!<strong>of</strong>!communication!nodes,!<br />
• address!memory!mapping.!<br />
!<br />
An!extension!<strong>of</strong>!this!work!was!reported!in![KEM06].!This!extension!describes!a!framework!<br />
targeted!to!MPSoC!s<strong>of</strong>tware!development,!verification,!and!evaluation,!which!already!starts!from!<br />
the! beginning! <strong>of</strong>! the! <strong>design</strong>! cycle! instead! <strong>of</strong>! starting! the! s<strong>of</strong>tware! <strong>design</strong>! after! the! plat<strong>for</strong>m! is!<br />
!