Logic Array Blocks and Adaptive Logic Modules in Cyclone ... - Altera

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1-10 Figure 1-9: ALM in Shared Arithmetic Mode for Cyclone V Devices Shared Arithmetic Chain datae0 datac datab dataa datad datae1 4-Input LUT 4-Input LUT 4-Input LUT 4-Input LUT shared_arith_in shared_arith_out carry_in carry_out labclk reg0 reg1 reg2 reg3 To General or Local Routing The shared arithmetic chain available in enhanced arithmetic mode allows the ALM to implement a 3-input adder. This significantly reduces the resources necessary to implement large adder trees or correlator functions. The shared arithmetic chain can begin in either the first or sixth ALM in a LAB. Similar to carry chains, the top and bottom half of the shared arithmetic chains in alternate LAB columns can be bypassed. This capability allows the shared arithmetic chain to cascade through half of the ALMs in an LAB while leaving the other half available for narrower fan-in functionality. In every LAB, the column is top-half bypassable; while in MLAB, columns are bottom-half bypassable. The Quartus II Compiler creates shared arithmetic chains longer than 20 ALMs (10 ALMs in arithmetic or shared arithmetic mode) by linking LABs together automatically. To enhance fitting, a long shared arithmetic chain runs vertically, allowing fast horizontal connections to the TriMatrix memory and DSP blocks. A shared arithmetic chain can continue as far as a full column. Document Revision History Date May 2013 Altera Corporation Document Revision History Version 2013.05.06 Changes • Added link to the known document issues in the Knowledge Base. • Removed register chain outputs information in ALM output section. • Removed reg_chain_in and reg_chain_out ports in ALM high-level block diagram and ALM connection details diagram. Logic Array Blocks and Adaptive Logic Modules in Cyclone V Devices CV-52001 2013.05.06 Feedback
CV-52001 2013.05.06 Date December 2012 June 2012 November 2011 October 2011 Version 2012.12.28 2.0 1.1 1.0 Changes Reorganized content and updated template. Updated for the Quartus II software v12.0 release: • Restructured chapter. • Updated Figure 1–6. Minor text edits. Initial release. Logic Array Blocks and Adaptive Logic Modules in Cyclone V Devices Feedback Document Revision History 1-11 Altera Corporation
Page 1 and 2: 2013.05.06 CV-52001 Subscribe Feedb
Page 3 and 4: CV-52001 2013.05.06 Figure 1-2: LAB
Page 5 and 6: CV-52001 2013.05.06 Figure 1-4: LAB
Page 7 and 8: CV-52001 2013.05.06 Figure 1-6: ALM
Page 9: CV-52001 2013.05.06 Figure 1-8: ALM

Logic Array Blocks and Adaptive Logic Modules in Cyclone ... - Altera

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