ELET 3132L - Lab #1

ELET 3132L - Lab #1 

Logic Gates and Families 

Revised 21-August-2010 

This exercise has two parts. The first part will be done in the MOSAIC computer lab. Students 

will perform simulations using MultiSIM and PSpice. The second part of this exercise will be 

done in the regularly scheduled lab room. The report for this exercise will combine the 

simulation results and the experimental results. 

INTRODUCTION: 

This experiment increases the student’s competency with circuit simulation, circuit construction, 

power supplies and multimeters. This laboratory also introduces the student to basic combinational 

logic gates. Finally this laboratory introduces the student to three digital architectures DTL, TTL and 

CMOS. 

SIMULATION (Part 1): MultiSim 

1. Log into an XP workstation using your username and password. 

2. Select Start→All Programs→Mosaic XP→Engineering→EngrTech→MultiSIM. 

3. You should see the opening screen from MultiSIM, and messages on the lower border for a 

few seconds. Finally you will see a blank schematic screen. First you want to create a place 

for the design in your Mosaic space. Select File→Save As, navigate to YOUR workspace (all 

the way up to your H drive then make a suitable directory) and type in a name for the project 

(I used “DTL”). Your dialog box should look like the one below. 

4. Click OK. 

Figure 1: SAVE AS Dialog Box 

5. First you will place components on your schematic (we’ll wire them later). A screen shot of 

the completed schematic for this first simulation appears below to help you can decide where 

to place parts. 

ELET 3132L Experiment #1 1 of 25

Figure 2: Multisim Screen Shot 

6. From the top bar menu select Place→Component… to open the component placement dialog 

box. 

7. This dialog box has several levels. Always use the Master Database – this database has all 

the parts you will need for your schematics. First choose the type of component you wish to 

place from the second drop down menu on the left. Then choose the specific component from 

the list on the right. For starters, pick Transistors from the second drop down menu on the 

left then pick BJT_NPN from the list of transistor types. Now find 2N3904 in the right side 

list of specific parts. Highlight 2N3904 as shown below then click OK. 


Figure 3: Component Selection Dialog Box 

8. Place the transistor on your blank schematic page. Now you will place the diodes on your 

schematic. Select Place→Component… again then from the lower left drop down menu 

choose Diodes. Select 1N914 from the column on the right and click OK. Place the diodes 

on the schematic. 

9. Notice the orientation is not correct for all of the diodes. To change the orientation on a diode 

(or any other component), put the cursor over the diode (component) and left-click once to 

select the diode (component). Then right-click once to open the operations menu for the 

selected component (see below). Select Flip Horizontal to spin the diode around. 

Figure 4: Pop-Up Menu 


10. Other useful operations on this menu include Properties (this is how you change the voltage 

on a battery or the frequency of a clock), Cut Copy Paste Delete can be used to copy selected 

components (saves time from having to go all the way through the menu system) and Font 

can be used to alter the size and appearance of text associated with the component. 

11. After flipping the two diodes on the left, add the two resistors. Resistors are in the Basic 

component group. Notice when you select RESISTOR there are two more drop down menus 

at the top of the dialog box – one is labeled Filter and is used to show either ALL, Ω, kΩ, or 

MΩ. You need to place a 4.7kΩ resistor so choose kΩ. The other drop down is for tolerance 

– the default of 5% is fine for digital work. Put the two resistors on the schematic and rotate 

them correctly. 

12. Now you need a power source. Choose Place →Component… again then select Sources and 

DC_Power to get a battery. Place it on the schematic then use the Properties item to change 

the voltage from 12 to 5. (You can also double left click on 12 then type in 5 and Enter.) 

13. Now you need to add two inputs to your circuit. In real life you could use switches but for 

simulation we will hook up two clocks – one for each input – and run them at different 

frequencies. That way we will generate all possible input patterns quickly. Choose 

Place→Component… then Sources→SIGNAL_VOLTAGE→CLOCK_VOLTAGE to place 

a clock generator. Add a second clock generator so you have one for each input. 

14. You must change the frequency on one of the clock generators. You could left click then 

right click then select Properties like you did with the battery. But there is a faster way. Just 

double left click on the text you want to change – in this case the leftmost one. So put the 

cursor arrow on top of the 1kHz frequency for the leftmost clock generator and double left 

click. Type in 2 in the dialog box and click OK. At this point your schematic should look 

something like: 

Figure 5: Component Placement 


15. Now you can add wires to connect the components. MultiSIM makes placing wires very 

simple though it is a little tricky. First put the cursor exactly over the end of a component. 

The cursor will become a dot. Left click once – this establishes the start point for the wire. 

Now move the cursor and watch the wire being drawn. At any point you can left-click once 

to force the wire to follow a particular shape – else EWB will only allow two bends in the 

wire. The wire is completed when you left click on the connection at another component or 

when you left click over another wire or when you double left-click. 

16. Finally you need to place grounds - under Sources→POWER_SOURCES→Ground. Place 

grounds on the schematic at the negative batter terminal, the negative clock generator 

terminals and the emitter of the transistor. 

17. Before you simulate, you will add net names. EWB gives every wire on your drawing a 

name. Wires that are connected together have the same name. These names are called net 

names. You can change the net name by double left-clicking on a wire in the net then typing 

in the new net name followed by the Enter key. Change the names on the nets we want to 

see from simulation – the two inputs and the output of your logic gate. 

18. Change the name of the net containing the positive terminal of the leftmost clock generator to 

INA. Change the name of the net containing the positive terminal of the other clock 

generator to INB. Change the name of the net containing the collector of the transistor to 

OUTY. Now you schematic should appear as below: 

Figure 6: Finished Schematic 

19. You are now ready to simulate. We will use a transient analysis as shown below: 


Figure 7:Simulate Menu 

20. There are only two things to setup. First set the stop time to 2 milliseconds so you can see 

two complete cycles of the slowest input (1kHz). Do this by changing TSTOP to 0.002. 

21. Second you need to pick what voltages to see on the output plot. Choose the Output tab then 

use the Add and Remove buttons to make your output display dialog box look like the one 

below. 

Figure 8: Transient Analysis 


22. Left-click the Simulate button to run the simulation. Your output plot probably looks a little 

confusing (Figure 9). That’s OK – we’ll unscramble it in a minute – but first notice all three 

voltages (INA, INB, OUTY) are overlaid on the same plot. All voltages are either 0 or 5 

volts as expected. There is some noise on the output at the switching times. 

Figure 9: Results Window 

23. There is a fast way to see all the traces individually. You will loose the voltage information 

because the vertical scale will get scrambled. Right click once inside the plot and select 

Properties. You will get a dialog box as shown: 

Figure 10: Graph Properties Dialog Box 


24. Left click once on Auto-Separate then left click once on Apply then left click once on OK. 

You may also want to make your plot window larger and reverse the background. Your plot 

should now look like: 

Figure 11: All Traces 

25. Choose File→Print to print the plot for your lab report. Close the plot window. Choose 

File→Print to print the schematic for your lab report. Choose File→Save All to save the 

entire DTL project in case you want to refer to it later. Close MultiSIM for now. 

SIMULATION (Part 2): PSpice 

1. Now you will perform a similar simulation using PSpice. To start PSpice, select Start→All 

Programs→MosaicXP→Engineering→Electrical→Cadence PSpice→Capture CIS. It can 

take a half-minute or so to start (depends on how busy the MOSAIC network is). Eventually 

you will see a dialog box as Capture starts. Pick the PCB Design Studio with Capture CIS 

choice. Capture CIS is the schematic entry point to PSpice. 

Figure 12: Suite Selection 


2. When Capture starts, you will see a blank project. Choose File→New→Project to make a 

new project. You will see the following dialog box. Make sure you pick a directory on your 

H drive, choose Analog or Mixed A/D and type in a name for your project (I used CMOS). 

Figure 13: New Project Dialog Box 

3. PAY ATTENTION: THIS IS IMPORTANT!! Capture is used for many different things 

from schematics to board design to simulation work. As such, it has many different parts 

libraries. You MUST use parts libraries that have PSpice simulation parameters. You will set 

the libraries up first so you have only PSpice parts in your design. 

4. Similar to MultiSIM, select Place→Part from the top menu bar. This is where part libraries 

are specified for Capture. You will see a dialog box as shown below. The first thing to do is 

to remove all the “unPSpice” parts libraries. So select each library by left clicking once on it 

then left click on the Remove Library button to remove it. You cannot remove the Design 

Cache – that is a file used to cache parts for your design. When you have finished removing 

libraries the dialog box should look like Figure 14: 

Figure 14: PLACE PART Dialog Box 


5. Now you will need to add the appropriate PSpice libraries to your project. From this same 

dialog box, left click the Add Library button. You will see a new dialog box showing all the 

libraries at the current location. Browse to the PSpice directory as shown: 

Figure 15: Open Dialog Box 

6. From the PSice directory, add the following libraries: analog.olb (contains miscellaneous 

passive parts), pwrmos.olb (contains MOSFET’s) and source.olb (contains power supplies 

and signal generators). When you finish your Place Parts dialog box should look like the one 

below. 

Figure 16: Part Selection Dialog Box 

7. Below (Figure 17) is a completed sketch of the schematic you will make. This should help 

you decide where to place items. 


Figure 17: Completed Schematic 

8. You are now ready to start placing parts. First place the P channel MOSFETs used to make 

this gate. Left click once on the PWRMOS library then type IRF9530 in the Part window. 

Capture will show you a complete part number IRF9530 and preview the part in the window. 

Click OK to place this part. Drop one on the schematic by left clicking once where you want 

the transistor. Place another one under the first one as shown in the example above. Since 

you only need two of them, press the Esc key to quit placing parts. These parts are P channel 

MOSFETs. As you may have noticed they are “upside down” for our purposes – the drain is 

on the top and the source is on the bottom. The procedure for flipping them is similar to that 

in ModelSIM; select a part by left-clicking on it. Then rightclick to get an operations menu as 

shown below (Figure 18). Choose Mirror Vertically to flip the part vertically. Notice this is 

also how you Copy, Edit Properties, etc. 

Figure 18: Pop Up Menu 


9. Now you can place the complementary parts – N channel MOSFETs. Use the same methods 

to place two of the IRF530 N channel MOSFETs on the schematic. These four transistors are 

all the parts needed for the logic gate. But as before you need to add a battery for power, two 

signal generators and ground connections. 

10. Choose Place→Parts again and select the SOURCE library. Add a battery by adding a VDC 

part to the schematic. Left click twice on the 0VDC and change it to 5V. Add the signal 

generators by adding two VPWL (Piece-Wise Linear) parts to the schematic. These are 

tougher to setup as you will have to describe the signal you want as pieces of lines. Be 

careful to setup the times and volts correctly. Left click twice on the top left signal generator. 

You will see the property editor screen as shown below. 

Figure 19: Property Editor Screen 

11. Figure 20 shows a single line of properties for the part. Use the scroll bar at the bottom to 

scroll far enough to the right to bring up the Time and Voltage slots as shown below: 

Figure 20: Single Line of properties 

12. Here is how to setup the signal generator. V1 is the voltage the generator will output at time 

T1, V2 at T2, V3 at T3, etc. YOU MUST ADD UNITS – s for seconds and v for volts. Here 

are the T’s and V’s to make a 500Hz square wave: 


Figure 21: Values for the Signal Generator 

13. When you finish putting in all eight times and voltages, be sure to left click once on the 

Apply button to save your work on this signal generator. You will see a little dialog box 

warning you that you are about to change something. Left click YES to proceed with saving 

your signal generation info. 

Figure 22: Warning Dialog Box 

14. Next left click on the lower X (see below) to kill the properties window (the upper X kills 

Capture). Ignore the error message and click NO when asked to save somewhere else. 

Figure 23: Choose the lower X 

15. Setup the right most signal generator in the same way. Left click twice on it. Then scroll all 

the way to the right of the properties line. This setup is shorter – you only need to enter 4 

pairs of numbers as shown in the table below. Remember to type in units also. 


Figure 24: Signal Generator Properties 

16. Be sure to left click the Apply button and left click Yes in the dialog box when you finish. 

Then close the properties window (the lower X), ignore the error dialog box and click on NO 

to avoid saving somewhere else. 

17. Left click once on the wiring tool in the right hand tool bar (see below) to wire the parts 

together. Similar to MultiSIM, you start wiring by left clicking once. You stop wiring by leftclicking 

twice. You stop placing wires by pressing the Esc key. 

Figure 25: Wiring Tool 

18. The final step is to add net names to the nets you want to see in the simulation output. 

Choose the net name tool from the right hand tool bar as shown below. Type in the net name 

INA followed by the Enter key for the leftmost signal input. Place the net name on the INA 

wire above the VPWL and left click. Press Esc to end placing that net name. 

Figure 26: Net Names Tool 

19. Repeat the previous step to add the name INB to the rightmost signal generator input. 

20. Repeat to add the name OUTY to the output connection between the P channel and N channel 

transistor drains. 


Figure 27: Placing Ground 

21. For the final step in preparing the schematic, add grounds to the battery, signal generators 

and source leads of the N channel transistors. PAY ATTENTION: THIS IS 

IMPORTANT!! You must use a particular ground (the 0/SOURCE ground) in order for 

your simulations to work. To find this ground, choose the ground tool from the right hand 

tool bar as shown below. Then select the entry called 0/SOURCE as shown below. Place 

grounds as needed in the circuit. 

22. Select PSpice→New Simulation Profile to create a profile describing how want this 

schematic simulated. You will see a dialog box like the one below. Be sure to set the 

Analysis Type to Time Domain (Transient) and the Run to time to 4000us (4000 micro 

seconds is 0.004 seconds – the end of the PWL data): 

Figure 28: Simulation Dialog Box 

23. Left click OK to accept your changes and close the dialog box. 

24. Select PSpice→Run from the top menu bar to run the simulation. This may take a few 

seconds. When it completes you will see a message in the simulation message window 

saying “Simulation complete”. Then PSpice will open an empty trace window. To add 

traces to the window, select Trace→Add Trace from the top menu bar. You will see the Add 

Traces dialog box as shown below. Unclick all of the middle boxes except Analog and 

Voltages as shown below. Then left click once on V(INA) to add that trace to the plot. Click 

OK to close the dialog box for now. 


Figure 29: Add Traces Dialog Box 

25. Now your plot window should look like the one below (Figure 30) with a single trace in it. 

Figure 30: Trace Results Window 

26. You will add two more plots to the window and put INB in the second plot and OUTY in the 

third plot. From the top menu bar select Plot→Add Plot to Window as shown below. This 

will add a second plot to the window. 


Figure 31: Plot Menu 

27. Now repeat the procedure in step 50 to add V(INB) to this plot. Then repeat step 51 to add 

another plot and repeat step 50 to add V(OUTY) to that plot. Your trace window should now 

look like the one shown below. 

Figure 32: Trace Results with new Traces 

28. The PSpice program has scaled the top plot differently from the first two, probably because 

the voltage spikes a bit above 5 and a bit below ground. You can change the scaling by 

selecting Plot→Axis Settings from the top menu bar. Then select the Y-Axis and select the 

User Defined radio button. Type in the new scale values of -1V for the lower limit and 6V 

for the upper limit and click OK. Change the scales on the other plots as well – this will 

make them much easier to read on a printout. (Else the plot and grid cover each other.) 

29. Notice if you try to print this plot on a black and white printer, you will not be able to see the 

actual data trace for all the grid lines. You will need to turn off the grid lines before printing 

your traces. As before, select Plot→Axis Settings. Then select the X Grid tab. Now select 

the radio buttons by None on both the Major and Minor grid configurations as shown in 

Figure 32: 


Figure 33: Axis Settings Dialog Box 

30. This turns off the X grid for all plots. The Y grid must be turned off on each plot. Select a 

plot by left clicking in it then disable the Y grid for it. Repeat for all three. Now your plot 

window should look like: 

Figure 34: PSpice Results 

31. Capture this image for your lab report. Open Microsoft Paint and place this image in Paint. 

Choose Image→Invert Colors to make this image presentable for your lab report (see Figure 

35). 


Figure 35: Inverted Colors (Using Paint) 

32. Select File→Save in the Capture main window. Select File->Print to print your schematic for 

your lab report. Then close Capture. 

SIMULATION (Part 3): Circuit 3: Your Choice: PSpice or MultiSim 

1. For the final simulation, you choose whether you want to use PSpice or MultiSIM. Print your 

schematic and simulation for your lab report. Remember the steps: 

• Sart the appropriate program 

• Use SaveAs to name your simulation and store it in an appropriate directory 

• Draw the schematic 

• Setup the simulation 

• Run the simulation 

2. Here is the schematic for part 3 in MultiSIM and in PSpice format: 


Figure 36: Circuit 3 in MultiSim 

Figure 37: Circuit 3 in PSpice 


Logic Gates and Families 

You will build the three logic circuits that you simulated on the computer. You will replace the 

signal generators used as inputs in the simulations with switches in the lab. You will also need 

pull-up resistors for the CMOS circuit inputs. 

INTRODUCTION: 

This laboratory increases the student’s competency with circuit simulation, circuit construction, 

power supplies, multimeters and oscilloscopes. This laboratory also introduces the student to basic 

combinational logic gates. Finally this laboratory introduces the student to three digital architectures 

DTL, TTL and CMOS. 

EQUIPMENT AND COMPONENTS: 

1 - dual trace oscilloscope 

1 - function generator 

1 - digital multimeter battery powered or isolated 

1 - power supply +5 volt 

2 - bipolar junction transistor 2N3904 

3 - diode 1N914 

1 - P channel IRF9530 

1 - N channel IRF530 

2 - resistor 4.7K, ¼W 

2 - switch SPST 


PROCEDURE: 

Steps 1 through 3: typical TTL (Transistor-Transistor Logic) Gate 

Figure 38: TTL Logic Gate 

Step 1. Construct the circuit shown in Figure 38 above with the +5V supply off and the function 

generator off. Turn the function generator amplitude all the way down. 

Step 2. Turn on the +5V supply. Turn on the function generator and set it for a sine wave, 1kHz, 

5VP-P with a 2.5VDC offset (0 to 5V signal). Use the oscilloscope to determine at what 

input voltage the Q1 turns on (VOUT = 0) and at what input voltage Q1 turns OFF 

(VOUT = 5V). 

Step 3. Fill out Table 1 as required. 

NM V V 

Table 1: Noise Margins 

= − LO 

Lo HI OUTHI INHI 

LO IN OUT 

NM = V − V 

What logic function does this TTL gate implement?__________________________ 


Steps 4 through 6: typical DTL (Diode-Transistor Logic) logic gate 

Figure 39: DTL Logic Gate 

Step 4. Construct the circuit shown in Figure 39 above with the +5V supply off. 

Step 5. Attach the multimeter between the collector of Q1 (plus lead) and ground (minus lead). 

Set the multimeter to read Volts DC. 

Step 6. Turn on the +5V supply. Measure the output voltage at Q1 for each of the four possible 

input conditions. Fill in Table 2 below. 

Table 2: Truth Table for the DTL Circuit 

What logic function does this DTL gate implement?_________________________ 


Steps 7 through 9: typical CMOS (Complementary Metal Oxide Semiconductor) logic gate 

Figure 40: CMOS Logic Gate 

Step 7. Construct the circuit shown in Figure 40 above with the +5V supply off.. 

Step 8. Attach the multimeter between the gate output where Q2, Q3 and Q4 drains are all tied 

together (plus lead) and ground (minus lead). Set the multimeter to read Volts DC. 

Step 9. Turn on the +5V supply. Measure the output voltage at Q3 drain for each of the four 

possible input conditions. Fill in Table 3 below. 

Table 3: Truth Table for CMOS Circuit 

What logic function does this CMOS gate implement?________________________ 


QUESTIONS: 

1. How does your lab data compare with your simulation results for each of the three circuits? 

2. Are the noise margins on the TTL inverter symmetric? Why or why not? 

3. Some DTL and TTL logic gates were manufactured with Open Collector outputs (no internal 

pull-up resistor on the collector of the output transistor). Why were pull-ups not necessary 

with TTL? (Hint: What is the default state of a TTL input if nothing is connected to it?) 

4. The gate on a MOSFET transistor requires almost no current. If the inputs are not driven 

either high or low then CMOS logic gates drift unpredictably causing erratic operation and 

excessive current consumption. Why are pull-up resistors required when interfacing open 

collector devices to CMOS logic gates? 

5. The DTL gate will draw about 2 mA when no input is supplied (5V / 4.7KΩ ≈ 1mA). About 

how much will the TTL gate draw? About how much will the CMOS gate draw? Which logic 

family (DTL, TTL, CMOS) do you think uses less power? Why? 

Signatures (turn this sheet in with your lab report): 

DTL Gate Simulation: 

___________________________________________________________________ 

(Instructor Signoff) 

TTL Gate Simulation: 

___________________________________________________________________ 


CMOS Gate Simulation: 

___________________________________________________________________ 


TTL Inverter Built: 

___________________________________________________________________ 


DTL Gate Built: 

___________________________________________________________________ 


CMOS Gate Built: 

___________________________________________________________________

ELET 3132L - Lab #1

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