EE 342: Electronics I Syllabus - csserver

EE 342: Electronics I Syllabus
Spring 2011 Instructors: Dr. Christina Howe
Classroom: KC243 KC 252
Days: TT 488-2691
Time: 9:30-10:45 A.M. howe@evansville.edu
Mr. Mark Randall
KC 247
488-2498
mr63@evansville.edu
Catalog Description: Lecture/project covers analysis and design of diode and transistor circuits. Diode, bipolar
junction transistor (BJT), and field effect transistor (JFET and MOSFET) device characteristics explored in detail.
Major topics include diode applications, transistor amplifiers and digital logic families. Clipping, rectification,
regulation and logic circuits included in the discussion of diode applications. Common transistor amplifier
configurations are compared with emphasis on differences in gain, input resistance and output resistance. Digital
logic family coverage includes discussion of CMOS, ECL and TTL. Several small team projects are used to
reinforce theory and to develop circuit design skills.
Prerequisite: Electrical Engineering 210
Text: Electronics Design – From Concept to Reality, Fourth Edition, Martin Roden, Gordon Carpenter, William
Wieserman, Discovery Press, © 2002
Software: LTSpice - Circuit simulation software. The software is installed on computers in all EE/CoE computer
labs. It may be downloaded for free from www.linear.com or the course web site. You may download the UE
LTSpice supplementary library from the course web site.
Course Structure: The class will meet three hours a week in lecture. This is a team-oriented course. Each student is
assigned to a 2 or 3 person team. All homework, lab exercises and design projects are to be completed as team
assignments.
Grading: The final grade will be determined from eight components weighted as follows:
Item Weight
Homework 12%
Lab Exercises 12%
Design Projects 15%
Three Exams 36%
Final Exam 20%
Contemporary Report 5%
Team Assignments: Not all team members will necessarily receive the same grade on team assignments
(homework, lab experiments, and design projects). A peer rating factor (see attached) will be applied to the project
grade to determine individual grades. With the peer rating factor a student who does nothing on a project will
receive an individual grade of zero.

Homework: Typically, two to five homework problems will be assigned every class period. Three or four class
assignments will be grouped into a homework set and homework sets will be collected on an approximately weekly
basis. To succeed in this course it is critically important that all homework problems be completed. Only one
homework solution is to be turned in per team and every student on the team should understand each problem
solution. Each homework solution should be signed by all team members. Each team may develop their own method
for producing the homework solution, but division-of-work methods (one team member works one problem, a second
team member works another problem, etc.) are not allowed. (One method that works well is to designate one person
as the recorder while other team members brainstorm on solutions to the problem. A different person acts as
recorder for each problem.) A Peer Rating Factor method will be used to determine individual grades on homework
assignments. (Refer to the Team Projects paragraph above.)
Lab Exercises: The lab exercises will be performed outside of class. Lab exercises are designed to take
approximately one hour to complete. The lab exercise write-up only need contain the results of the exercise and a
brief discussion of the results. Only one lab exercise write-up is to be handed in per team. The write-up should be
done on a word processor. All graphs should be of professional quality (generated by a spreadsheet program or other
computer plotting program). In lab exercises requiring both physical and simulated measurements the team may
divide into groups, with one group recording the physical measurements while the other group does the simulation.
Students must rotate the tasks of circuit construction, circuit verification, measurement, and data recording (one
student may be responsible for more than one task) from one exercise to the next. Each lab exercise write-up should
be signed by all team members. A Peer Rating Factor method will be used to determine individual grades on lab
exercises. (Refer to the Team Projects paragraph above.)
Design Projects: There will be two to three design projects during the semester. Design projects are open-ended and
are more time consuming than lab exercises. A design project report is more comprehensive than a lab exercise
write-up. Only one project report is to be written per team. Each project report should be signed by all team
members. A Peer Rating Factor method will be used to determine individual grades on design projects. (Refer to the
Team Projects paragraph above.)
Exams: Three exams will be given during the normal class meeting time.
Final Exam: Approximately one-third of the final exam will be over material covered after the third regular exam,
the other two-thirds of the exam will be comprehensive.
Contemporary Report: This is a summary report about new engineering technology or a current issue affecting the
engineering profession. Sources of information include the Internet, professional society meetings, or technical or
professional magazines.
Reading Assignments: Reading assignments will be given every class period. All reading assignments should be
completed before the next class period.
Attendance: Regular attendance is critical to your success in this course. Please refer to the section on Class
Attendance in the student handbook.
Class Policies: Students are expected to abide by the Academic Honor Code. No aid should be given or requested
on any examination. Students may collaborate on homework (in fact, this is encouraged), but each student must
submit their own work. Each student is expected to be able to recreate any homework solutions submitted. Students
working on team projects are expected to participate in all aspects of the project. Each student on a project team
should do their fair share of the work. Collaboration between project teams is not permitted.
Topics:
Semiconductor materials and properties
Diode characteristics and circuits
Bipolar junction transistors (BJTs)
Field-effect transistors (FETs)
Small Signal Transistor Models
Single Stage Transistor Amplifiers
Bipolar digital circuits. (TTL, ECL)
MOSFET digital circuits. (CMOS)

Course Objectives
List characteristics of semiconductor material.
Understand diode structure and various diode models.
Apply various diode models in circuit analysis.
Design diode rectifiers and wave-shaping circuits.
Design DC power supplies.
Understand the operation of bipolar junction transistors (BJTs).
Analyze BJT biasing circuits by employing an appropriate model for the BJT.
Understand the operation of field-effect transistors (FETs).
Analyze FET biasing circuits by employing an appropriate model for the FET.
Employ small-signal models in the analysis of transistor amplifiers.
Calculate the voltage gain and input and output resistances of transistor amplifier circuits.
Analyze and design common single stage transistor amplifiers.
Analyze CMOS, ECL and TTL logic gates.
University Objectives
Students will acquire a depth of knowledge in one or more disciplines of their choice.
Students will master communication, organizational and critical thinking skills.
Students will develop skills and competencies to be productive team members and leaders.
Students will seek and use available resources, including technology, to answer questions and solve
problems.

Lecture Schedule:
This schedule is tentative. The instructor reserves the right to change it.
Tuesday Thursday
Jan. 11 Jan. 13
Ch. 1 & 3.0-3.1 3.2
Intro & Semiconductor Physics Semiconductor Diodes
Jan. 18 Jan. 20
3.3-3.4 3.5, 3.7
Rectification and Zener Diodes Clippers, Clampers, Other Diodes
Jan. 25 Jan. 27
3.8 / Review Exam I - Ch 1 & 3
Manufacturers' Specs
Feb. 1 Feb. 3
4.0-4.3 4.4-4.8
BJT Structure and Models AC Model, Response Curves, Amp Biasing
Feb. 8 Feb. 10
4.9-4.11 4.12-4.15
BJT Biasing, Power, and Amp Analysis BJT Analysis and Design
Feb. 15 Feb. 17
5.1-5.2 5.3-5.4
CE and ER Amplifiers EF and CB Amplifiers
Feb. 22 Feb. 24
5.5-5.8 5.9 / Review
Applications and Coupling Cascode Configuration
Mar. 1 Mar. 3
Exam II - Ch 4 & 5 6.0-6.3
MOSFETs and JFETs
Mar. 8 Mar. 10
NO CLASS NO CLASS
SPRING BREAK SPRING BREAK
Mar. 15 Mar. 17
6.4-6.5 6.6-6.9
FET Amplifier Configurations and Ics FET Amplifier Analysis
Mar. 22 Mar. 24
6.10 14.0-14.2
FET Amp Design High-Pass RC and Lo-Pass RC Networks
Mar. 29 Mar. 31
14.3-14.5 14.5 / Review
Diodes, Trigger Circuits, 555 Timer 555 Timer
Apr. 5 Apr. 7
Exam III - Ch 6 & 14 15.0-15.4
Basics of Digital Logic and Digital BJTs
Apr. 12 Apr. 14
15.5-15.6 15.7-15.9
Logic Families and TTL ECL and Digital FETs
Apr. 19 Apr. 21
15.10-15.11 Open
CMOS
Apr. 26
Final Review
The Final Exam is on Wednesday, May 4th at 10:15 AM